MC74ACT253DG

© Semiconductor Components Industries, LLC, 2015
March, 2015 − Rev. 7
1 Publication Order Number:
MC74AC253/D
MC74AC253, MC74ACT253
Dual 4-Input Multiplexer
with 3-State Outputs
The MC74AC253/74ACT253 is a dual 4−input multiplexer with
3−state outputs. It can select two bits of data from four sources using
common select inputs. The outputs may be individually switched to a
high impedance state with a HIGH on the respective Output Enable
(OE
) inputs, allowing the outputs to interface directly with bus
oriented systems.
Multifunctional Capability
Noninverting 3−State Outputs
Outputs Source/Sink 24 mA
ACT253 Has TTL Compatible Inputs
These are Pb−Free Devices
1516 14 13 12 11 10
21 3456
7
V
CC
9
8
OE
b
S
0
I
3b
I
2b
I
1b
I
0b
Z
b
OE
a
S
1
I
3a
I
2a
I
1a
I
0a
Z
a
GND
Figure 1. Pinout: 16−Lead Packages Conductors
(Top View)
PIN NAME
PIN FUNCTION
I
0a
−I
3a
Side A Data Inputs
I
0b
−I
3b
Side B Data Inputs
S
0
, S
1
Common Select Inputs
OE
a
Side A Output Enable Input
OE
b
Side B Output Enable Input
Z
a,
Z
b
3−State Outputs
www.onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
ORDERING INFORMATION
SOIC−16
D SUFFIX
CASE 751B
TSSOP−16
DT SUFFIX
CASE 948F
1
16
1
16
MARKING
DIAGRAMS
xxx = AC or ACT
A = Assembly Location
WL or L = Wafer Lot
Y = Year
WW or W = Work Week
G or G = Pb−Free Package
1
16
xxx253G
AWLYWW
xxx
253
ALYWG
G
1
16
(Note: Microdot may be in either location)
MC74AC253, MC74ACT253
www.onsemi.com
2
TRUTH TABLE
Select
Inputs
Data Inputs
Output
Enable
Outputs
S
0
S
1
I
0
I
1
I
2
I
3
OE Z
X X X X X X H Z
L L L X X X L L
L L H X X X L H
H L X L X X L L
H L X H X X L H
L H X X L X L L
L H X X H X L H
H H X X X L L L
H H X X X H L H
Address inputs S
0
and S
1
are common to both sections.
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
FUNCTIONAL DESCRIPTION
The MC74AC253/74ACT253 contains two identical
4−input multiplexers with 3−state outputs. They select two
bits from four sources selected by common Select inputs (S
0
,
S
1
). The 4−input multiplexers have individual Output
Enable (OE
a
, OE
b
) inputs which, when HIGH, force the
outputs to a high impedance (High Z) state. This device is the
logic implementation of a 2−pole, 4−position switch, where
the position of the switch is determined by the logic levels
supplied to the two select inputs. The logic equations for the
outputs are shown:
Z
a
= OE
a
(I
0a
S
1
S
0
+I
1a
S
1
S
0
+
I
2a
S
1
S
0
+I
3a
S
1
S
0
)
Z
b
= OE
b
(I
0b
S
1
S
0
+I
1b
S
1
S
0
+
I
2b
S
1
S
0
+I
3b
S
1
S
0
)
If the outputs of 3−state devices are tied together, all but
one device must be in the high impedance state to avoid high
currents that would exceed the maximum ratings. Designers
should ensure that Output Enable signals to 3−state devices
whose outputs are tied together are designed so that there is
no overlap.
OE
b
I
3b
I
2b
I
1b
I
0b
S
0
S
1
I
3a
I
2a
Z
b
Z
a
I
1a
I
0a
OE
a
NOTE: This diagram is provided only for the understanding of logic operations
and should not be used to estimate propagation delays.
Figure 3. Logic Diagram
Figure 2. Logic Symbol
S
0
S
1
OE
a
I
0a
I
1a
I
2a
I
3a
Z
a
Z
b
I
0b
I
1b
I
2b
I
3b
OE
b
MC74AC253, MC74ACT253
www.onsemi.com
3
MAXIMUM RATINGS
Symbol Parameter Value Unit
V
CC
DC Supply Voltage −0.5 to +7.0 V
V
I
DC Input Voltage *0.5 V
CC
+0.5 V
V
O
DC Output Voltage (Note 1) *0.5 V
CC
+0.5 V
I
IK
DC Input Diode Current ±20 mA
I
OK
DC Output Diode Current ±50 mA
I
O
DC Output Sink/Source Current ±50 mA
I
CC
DC Supply Current per Output Pin ±50 mA
I
GND
DC Ground Current per Output Pin ±50 mA
T
STG
Storage Temperature Range −65 to +150 °C
T
L
Lead temperature, 1 mm from Case for 10 Seconds 260 °C
T
J
Junction temperature under Bias +150 °C
q
JA
Thermal Resistance (Note 2) SOIC
TSSOP
69.1
103.8
°C/W
P
D
Power Dissipation in Still Air at 65°C (Note 3) SOIC
TSSOP
500
500
mW
MSL Moisture Sensitivity Level 1
F
R
Flammability Rating Oxygen Index: 30% − 35% UL 94 V−0 @ 0.125 in
V
ESD
ESD Withstand Voltage Human Body Model (Note 4)
Machine Model (Note 5)
Charged Device Model (Note 6)
> 2000
> 200
> 1000
V
I
Latch−Up
Latch−Up Performance Above V
CC
and Below GND at 85°C (Note 7) ±100 mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. I
O
absolute maximum rating must be observed.
2. The package thermal impedance is calculated in accordance with JESD51−7.
3. 500 mW at 65°C; derate to 300 mW by 10 mW/ from 65°C to 85°C.
4. Tested to EIA/JESD22−A114−A.
5. Tested to EIA/JESD22−A115−A.
6. Tested to JESD22−C101−A.
7. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Typ Max Unit
V
CC
Supply Voltage
AC 2.0 5.0 6.0
V
ACT 4.5 5.0 5.5
V
IN
, V
OUT
DC Input Voltage, Output Voltage (Ref. to GND) 0 V
CC
V
t
r
, t
f
Input Rise and Fall Time (Note 1)
AC Devices except Schmitt Inputs
V
CC
@ 3.0 V 150
V
CC
@ 4.5 V 40 ns/V
V
CC
@ 5.5 V 25
t
r
, t
f
Input Rise and Fall Time (Note 2)
ACT Devices except Schmitt Inputs
V
CC
@ 4.5 V 10
ns/V
V
CC
@ 5.5 V 8.0
T
A
Operating Ambient Temperature Range −40 25 85 °C
I
OH
Output Current − High −24 mA
I
OL
Output Current − Low 24 mA
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
1. V
IN
from 30% to 70% V
CC
; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. V
IN
from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.

MC74ACT253DG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Encoders, Decoders, Multiplexers & Demultiplexers 5V Dual 4-Input w/3-State Out
Lifecycle:
New from this manufacturer.
Delivery:
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