AD8228
Rev. 0 | Page 15 of 24
15105
OUTPUT VOLTAGE STEP SIZE (V p-p)
SETTLING TIME (µs)
07035-041
15
10
5
0
02
0
20.0
17.5
15.0
12.5
10.0
02015105
OUTPUT VOLTAGE STEP SIZE (V p-p)
SETTLING TIME (µs)
07035-042
0.001% SETTLING TIME
G = 10
R
L
= 10k
0.01% SETTLING TIME
0.001% SETTLING TIME
G = 100
R
L
= 10k
0.01% SETTLING TIME
Figure 39. Settling Time vs. Step Size, G = 10 Figure 40. Settling Time vs. Step Size, G = 100
AD8228
Rev. 0 | Page 16 of 24
THEORY OF OPERATION
C1 C2
II
I
B
COMPENSATIONI
B
COMPENSATION
V
BIAS
A1 A2
A3
R4
489
G1 G2
GAIN
SET
R3
4.889k
R2
22k
R1
22k
V1 V2
+V
S
+V
S
–V
S
+V
S
–V
S
Q1 Q2
600
–V
S
–IN
+V
S
600
–V
S
+IN
+V
S
–V
S
10k
10k
10k
10k
+V
S
–V
S
OUTPUT
REF
07035-018
Figure 41. Simplified Schematic
ARCHITECTURE
The AD8228 is based on the classic three op amp topology. This
topology has two stages: a preamplifier to provide differential
amplification, followed by a difference amplifier to remove the
common-mode voltage.
Figure 41 shows a simplified schematic
of the AD8228.
The first stage is composed of the A1 and A2 amplifiers, the Q1
and Q2 input transistors, and the R1 through R4 resistors. The
feedback loop of A1, R1, and Q1 ensures that the V1 voltage is
a constant diode drop below in the negative input voltage.
Similarly, V2 is kept a constant diode drop below the positive
input. Therefore, a replica of the differential input voltage is
placed across either R3 (when the gain pins are left open) or
R3||R4 (when the gain pins are shorted). The current that flows
across this resistance must also flow through the R1 and R2
resistors, creating a gained differential signal between the A2
and A1 outputs. Note that, in addition to a gained differential
signal, the original common-mode signal, shifted a diode drop
down, is also still present.
The second stage is a difference amplifier, composed of A3 and
four 10 kΩ resistors. The purpose of this stage is to remove the
common-mode signal from the amplified differential signal.
The AD8228 does not depend on external resistors. Much of the
dc performance of precision circuits depends on the accuracy and
matching of resistors. The resistors on the AD8228 are laid out to
be tightly matched. The resistors of each part are laser trimmed
and tested for their matching accuracy. Because of this trimming
and testing, the AD8228 can guarantee high accuracy for speci-
fications such as gain drift, common-mode rejection (CMRR),
and gain error.
SETTING THE GAIN
The AD8228 can be configured for a gain of 10 or 100 with no
external components. Leave Pin 2 and Pin 3 open for a gain of 10;
short Pin 2 and Pin 3 together for a gain of 100 (see
Figure 42).
07035-003
AD8228
1
2
3
4
8
5
6
7
+V
S
–V
S
REF
–IN
+IN
AD8228
1
2
3
4
8
5
6
7
+V
S
–V
S
REF
V
OUT
V
OUT
–IN
+IN
G = 10
PIN 2 AND PIN 3 OPEN
G = 100
PIN 2 AND PIN 3 SHORTED
Figure 42. Setting the Gain
The transfer function with Pin 2 and Pin 3 open is
V
OUT
= 10 × (V
IN+
V
IN−
) + V
REF
The transfer function with Pin 2 and Pin 3 shorted is
V
OUT
= 100 × (V
IN+
V
IN−
) + V
REF
COMMON-MODE INPUT VOLTAGE RANGE
The three op amp architecture of the AD8228 applies gain and
then removes the common-mode voltage. Therefore, internal
nodes in the AD8228 experience a combination of both the
gained signal and the common-mode signal. This combined
signal can be limited by the voltage supplies even when the
individual input and output signals are not.
Figure 10 through
Figure 13 show the allowable common-mode input voltage
ranges for various output voltages and supply voltages.
AD8228
Rev. 0 | Page 17 of 24
REFERENCE TERMINAL
The output voltage of the AD8228 is developed with respect to
the potential on the reference terminal. This is useful when the
output signal needs to be offset to a precise midsupply level. For
example, a voltage source can be tied to the REF pin to level-shift
the output so that the AD8228 can drive a single-supply ADC. The
REF pin is protected with ESD diodes and should not exceed
either +V
S
or −V
S
by more than 0.3 V.
For best performance, source impedance to the REF terminal
should be kept below 1 Ω. As shown in
Figure 41, the reference
terminal, REF, is at one end of a 10 k resistor. Additional imped-
ance at the REF terminal adds to this 10 k resistor and results
in amplification of the signal connected to the positive input.
The amplification from the additional R
REF
can be computed by
(
)
REF
REF
R
R
+
+×
k20
k102
Only the positive signal path is amplified; the negative path is
unaffected. This uneven amplification degrades the CMRR of
the amplifier.
INCORRECT
V
CORRECT
AD8228
OP1177
+
V
07035-005
REF
AD8228
REF
Figure 43. Driving the Reference
LAYOUT
The AD8228 is a high precision device. To ensure optimum
performance at the PCB level, care must be taken in the design
of the board layout. The AD8228 pins are arranged in a logical
manner to aid in this task.
8
7
6
5
1
2
3
4
–IN
G1
G2
+V
S
V
OUT
REF
–V
S
+IN
TOP VIEW
(Not to Scale)
AD8228
07035-044
Figure 44. Pinout Diagram
Common-Mode Rejection Ratio over Frequency
The AD8228 has a higher CMRR over frequency than typical
in-amps, which gives it greater immunity to disturbances such
as line noise and its associated harmonics. The AD8228 pinout
was designed so that the board designer can take full advantage
of this performance with a well-implemented layout.
Poor layout can cause some of the common-mode signal to be
converted to a differential signal before it reaches the in-amp.
Such conversions occur when one input path has a frequency
response that is different from the other. To keep CMRR across
frequency high, input source impedance and capacitance of each
path should be closely matched. Additional source resistance in
the input path (for example, for input protection) should be placed
close to the in-amp inputs, which minimizes their interaction
with parasitic capacitance from the PCB traces.
Parasitic capacitance at the gain setting pins can also affect
CMRR over frequency. If the board design has a component at
the gain setting pins (for example, a switch or jumper), the part
should be chosen so that the parasitic capacitance is as small as
possible.
Power Supplies
A stable dc voltage should be used to power the instrumentation
amplifier. Noise on the supply pins can adversely affect perform-
ance. See the PSRR performance curves in
Figure 17 and Figure 18
for more information.
A 0.1 µF capacitor should be placed as close as possible to each
supply pin. As shown in
Figure 45, a 10 µF tantalum capacitor
can be used farther away from the part. In most cases, it can be
shared by other precision integrated circuits.
AD8228
+
V
S
+IN
–IN
LOAD
REF
0.1µF
10µF
0.1µF 10µF
–V
S
V
OUT
07035-006
Figure 45. Supply Decoupling, REF, and Output Referred to Local Ground

AD8228ARZ-R7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Instrumentation Amplifiers IC Fixed Gain PREC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union