AT97SC3205 [SUMMARY DATASHEET]
Atmel-8884AS-TPM-AT97SC3205-Datasheet-Summary_022014
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3. Pin Description
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Table 3-1. Pin Descriptions
Pin Description
V
CC
Power Supply, 3.3V. Care should be taken to prevent excessive noise. Effective decoupling of the V
CC
inputs to the
Atmel TPM is critical to assure consistently reliable operation over the lifetime of the system. The Atmel
recommendation is for a decoupling bypass capacitor within the range of 2200pF to 4700pF, to be placed as close as
possible, < 5mm, to each of the V
CC
pins, located between each V
CC
pin and the immediately adjacent GND pin. A
0.1μF decoupling bypass capacitor should be placed at the node in which these V
CC
traces join, which should be as
close as possible, < 10mm, to the TPM. In all cases, this bypass capacitor should be closer than the next closest
component. All capacitors should be of high quality, with dielectric ratings of X5R or X7R. A low-power state is
automatically entered when the chip is idle. No further action is required by the system to enter low-power mode.
GND
System Ground.
GPIO Express-00
General Purpose Input/Output. Internal pull-up resistor. This pin is mapped to NV Index
TPM_NV_INDEX_GPIO_00. Default TPM configuration: GPIO Input. GPIO-Express-00 also serves as the XOR
chain Output during I/O test mode. Since GPIO-Express-00 has an internal pull-up, it should be left floating if unused.
PP/GPIO
General Purpose Input/Output. Internal pull-down resistor. This pin is an indicator for hardware physical
presence; active high. Default TPM configuration: GPIO input. Since PP/GPIO has an internal pull-down, it should be
left floating if unused.
GPIO
General Purpose Input/Output. If unused, this pin can be tied to GND or V
CC
at the customers discretion.
MISO
Master In Slave Out. SPI Slave Data Output. This pin serves as the SPI Data output from the TPM.
MOSI
Master Out Slave In. SPI Slave Data Input. This pin serves as the SPI Data Input to the TPM.
PIRQ#
SPI Interrupt Pin, Active-low. This pin is used by the TPM to assert interrupts. If unused, this pin should be tied to
ground directly or through a 4.7K resistor.
SPI_CLK
Clock used to drive the SPI bus. This pin should be asserted high for power savings when the TPM is not in use.
SPI_CS#
SPI_CS# Chip Select, Active-low. The TPM chip select.
SPI_RST#
SPI Reset Pin, Active-low. Pulsing this signal low resets the internal state of the TPM, and is equivalent to
removal/restoration of power to the chip. The required minimum reset pulse width is 2μs. On power-up, it is critical
that reset be kept active-low until V
CC
, and SPI_CLK stabilize. To be compliant with TCG requirements, this pin
needs to be tied to system reset. TPM_Init is indicated by asserting this pin.
TestI
TestI Manufacturing Test Input. Disabled after manufacturing. Tie TestI to ground directly or through a 4.7k
resistor.
TestBI/GPIO/
XTamper
TestBI Manufacturing Test Input. The Atmel TPM does not support legacy addressing via the optional BADD
implementation of this pin.The TestBI pin also serves as the XTamper pin or an additional GPIO pin, active high.
(See the application note, “Atmel Specific TPM Commands Reference Guide” for details on XTamper
implementation). If unused, this pin should be tied to ground directly or through a 4.7K resistor.
NC
No Connect Pins (TSSOP).
The AT97SC3205 TSSOP package has additional pins which are no connects and can be tied to GND, V
CC
, or left
floating at the customers discretion:
NC – TSSOP Pin 5
NC – TSSOP Pin 12
NC – TSSOP Pin 13
NC – TSSOP Pin 14
NC – TSSOP Pin 15
NC – TSSOP Pin 27
NC – TSSOP Pin 28
