© Semiconductor Components Industries, LLC, 2013
March, 2013 − Rev. 1
1 Publication Order Number:
NVD6820NL/D
NVD6820NL
Power MOSFET
90 V, 17 mW, 50 A, Single N−Channel
Features
• Low R
DS(on)
to Minimize Conduction Losses
• High Current Capability
• Avalanche Energy Specified
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS (T
J
= 25°C unless otherwise noted)
Parameter
Symbol Value Unit
Drain−to−Source Voltage V
DSS
90 V
Gate−to−Source Voltage V
GS
"20 V
Continuous Drain Cur-
rent R
q
JC
(Notes 1 & 3)
Steady
State
T
C
= 25°C
I
D
50
A
T
C
= 100°C 35
Power Dissipation R
q
JC
(Note 1)
T
C
= 25°C
P
D
100
W
T
C
= 100°C 50
Continuous Drain
Current R
q
JA
(Notes 1,
2 & 3)
Steady
State
T
A
= 25°C
I
D
10
A
T
A
= 100°C 7.0
Power Dissipation R
q
JA
(Notes 1 & 2)
T
A
= 25°C
P
D
4.0
W
T
A
= 100°C 2.0
Pulsed Drain Current
T
A
= 25°C, t
p
= 10 ms
I
DM
310 A
Operating Junction and Storage Temperature T
J
, T
stg
−55 to
175
°C
Source Current (Body Diode) I
S
50 A
Single Pulse Drain−to−Source Avalanche
Energy (T
J
= 25°C, V
GS
= 10 V, I
L(pk)
= 31 A,
L = 0.3 mH, R
G
= 25 W)
E
AS
144 mJ
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter Symbol Value Unit
Junction−to−Case − Steady State (Drain)
R
q
JC
1.5
°C/W
Junction−to−Ambient − Steady State (Note 2)
R
q
JA
38
1. The entire application environment impacts the thermal resistance values
shown, they are not constants and are only valid for the particular conditions
noted.
2. Surface−mounted on FR4 board using a 650 mm
2
, 2 oz. Cu pad.
3. Continuous DC current rating. Maximum current for pulses as long as 1
second is higher but is dependent on pulse duration and duty cycle.
DPAK
CASE 369C
STYLE 2
MARKING DIAGRAMS
& PIN ASSIGNMENT
90 V
16.7 mW @ 10 V
R
DS(on)
50 A
I
D
V
(BR)DSS
20.4 mW @ 4.5 V
http://onsemi.com
1
2
3
4
N−Channel
D
S
G
1
Gate
2
Drain
3
Source
4
Drain
YWW
68
20LG
Y = Year
WW = Work Week
6820L = Device Code
G = Pb−Free Package
Device Package Shipping
†
ORDERING INFORMATION
NVD6820NLT4G DPAK
(Pb−Free)
2500/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
