IPD50P04P413ATMA1

P1-P3 P4-P6 P7-P9

Type

IPD50P04P4-13

OptiMOS

®

-P2 Power-Transistor

Features

• P-channel - Normal Level - Enhancement mode

• AEC qualified

• MSL1 up to 260°C peak reflow

• 175°C operating temperature

• Green package (RoHS compliant)

• 100% Avalanche tested

Maximum ratings, at T

j

=25 °C, unless otherwise specified

Parameter Symbol Conditions Unit

Continuous drain current

1)

I

D

T

C

=25°C,

V

GS

=-10V

-50 A

T

C

=100°C,

V

GS

=-10V

2)

-45

Pulsed drain current

2)

I

D,pulse

T

C

=25°C

-200

Avalanche energy, single pulse

2)

E

AS

I

D

=-25A

18 mJ

Avalanche current, single pulse

I

AS

-

-50 A

Gate source voltage

V

GS

- ±20 V

Power dissipation

P

tot

T

C

=25 °C

58 W

Operating and storage temperature

T

j

, T

stg

- -55 ... +175 °C

IEC climatic category; DIN IEC 68-1 - - 55/175/56

Value

V

DS

-40 V

R

DS(on)

12.6

mW

I

D

-50 A

Product Summary

PG-TO252-3-313

Type Package Marking

IPD50P04P4-13 PG-TO252-3-313 4P0413

Rev. 1.2

page 1 2013-12-09

IPD50P04P4-13

Parameter Symbol Conditions Unit

min. typ. max.

Thermal characteristics

2)

Thermal resistance, junction - case

R

thJC

- - - 2.6 K/W

SMD version, device on PCB

R

thJA

minimal footprint - - 62

6 cm

2

cooling area

3)

- - 40

Electrical characteristics, at T

j

=25 °C, unless otherwise specified

Static characteristics

Drain-source breakdown voltage

V

(BR)DSS

V

GS

=0V, I

D

= -1mA

-40 - - V

Gate threshold voltage

V

GS(th)

V

DS

=V

GS

, I

D

=-85µA

-2.0 -3.0 -4.0

Zero gate voltage drain current

I

DSS

V

DS

=-32V, V

GS

=0V,

T

j

=25°C

- -0.05 -1 µA

V

DS

=-32V, V

GS

=0V,

T

j

=125°C

2)

- -20 -200

Gate-source leakage current

I

GSS

V

GS

=-20V, V

DS

=0V

- - -100 nA

Drain-source on-state resistance

R

DS(on)

V

GS

=-10V, I

D

=-50A

- 9.2 12.6

mW

Values

Rev. 1.2

page 2 2013-12-09

IPD50P04P4-13

Parameter Symbol Conditions Unit

min. typ. max.

Dynamic characteristics

2)

Input capacitance

C

iss

- 2820 3670 pF

Output capacitance

C

oss

- 1000 1500

Reverse transfer capacitance

C

rss

- 30 60

Turn-on delay time

t

d(on)

- 17 - ns

Rise time

t

r

- 10 -

Turn-off delay time

t

d(off)

- 22 -

Fall time

t

f

- 28 -

Gate Charge Characteristics

2)

Gate to source charge

Q

gs

- 14 19 nC

Gate to drain charge

Q

gd

- 7 14

Gate charge total

Q

g

- 39 51

Gate plateau voltage

V

plateau

- 5.4 - V

Reverse Diode

Diode continous forward current

2)

I

S

- - -50 A

Diode pulse current

2)

I

S,pulse

- - -200

Diode forward voltage

V

SD

V

GS

=0V, I

F

=-50A,

T

j

=25°C

- -1 -1.3 V

Reverse recovery time

2)

t

rr

- 39 - ns

Reverse recovery charge

2)

Q

rr

- 32 - nC

2)

Defined by design. Not subject to production test.

3)

Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm

2

(one layer, 70 µm thick) copper area for drain

connection. PCB is vertical in still air.

1)

Current is limited by bondwire; with an R

thJC

= 2.6K/W the chip is able to carry -55A at 25°C.

T

C

=25°C

Values

V

GS

=0V, V

DS

=-25V,

f=1MHz

V

DD

=-20V,

V

GS

=-10V, I

D

=-50A,

R

G

=3.5W

V

DD

=-32V, I

D

=-50A,

V

GS

=0 to -10V

V

R

=-20V, I

F

=-50A,

di

F

/dt=-100A/µs

Rev. 1.2

page 3 2013-12-09

P1-P3 P4-P6 P7-P9

IPD50P04P413ATMA1

Mfr. #:

Buy IPD50P04P413ATMA1

Manufacturer:

Infineon Technologies

Description:

MOSFET P-Ch -40V -50A DPAK-2 OptiMOS-P2

Lifecycle:

New from this manufacturer.

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IPD50P04P413ATMA1