74FCT807BTQG8

4
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - COMMERCIAL
(3,4)
FCT807BT FCT807CT
Symbol Parameter Conditions
(1)
Min.
(2)
Max. Min.
(2)
Max. Unit
t
PLH Propagation Delay 1.3 2.7 1.3 2.5 ns
tPHL
tR Output Rise Time 1.5 1.5 ns
tF Output Fall Time 1.5 1.5 ns
t
SK(O) Output skew: skew between outputs of all banks of 0.5 0.25 ns
same package (inputs tied together)
t
SK(P) Pulse skew: skew between opposite transitions 0.5 0.35 ns
of same output (|tPHL -– tPLH|)
tSK(T) Package skew: skew between outputs of different 0.9 0.65 ns
packages at same power supply voltage,
temperature, package type and speed grade
50 to VCC/2,
CL = 10pF
(See figure 1)
or 50 ac
termination,
CL = 10pF
(See figure 2)
f 100MHz
Outputs connected in
groups of two
FCT807BT FCT807CT
Symbol Parameter Conditions
(1)
Min.
(2)
Max. Min.
(2)
Max. Unit
t
PLH Propagation Delay 1.5 3.8 1.5 3.5 ns
tPHL
tR Output Rise Time 1.5 1.5 ns
tF Output Fall Time 1.5 1.5 ns
t
SK(O) Output skew: skew between outputs of all banks of 0.5 0.25 ns
same package (inputs tied together)
t
SK(P) Pulse skew: skew between opposite transitions 0.5 0.35 ns
of same output (|tPHL -– tPLH|)
t
SK(T) Package skew: skew between outputs of different 0.9 0.75 ns
packages at same power supply voltage,
temperature, package type and speed grade
CL = 30pF
f 67MHz
(See figure 3)
FCT807BT FCT807CT
Symbol Parameter Conditions
(1)
Min.
(2)
Max. Min.
(2)
Max. Unit
t
PLH Propagation Delay 1.5 3.8 1.5 3.5 ns
tPHL
tR Output Rise Time 1.5 1.5 ns
tF Output Fall Time 1.5 1.5 ns
t
SK(O) Output skew: skew between outputs of all banks of 0.5 0.35 ns
same package (inputs tied together)
t
SK(P) Pulse skew: skew between opposite transitions 0.6 0.45 ns
of same output (|tPHL -– tPLH|)
tSK(T) Package skew: skew between outputs of different 1 0.75 ns
packages at same power supply voltage,
temperature, package type and speed grade
CL = 30pF
f 40MHz
(See figure 4)
5
IDT74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - INDUSTRIAL
(3,4)
FCT807BT FCT807CT
Symbol Parameter Conditions
(1)
Min.
(2)
Max. Min.
(2)
Max. Unit
t
PLH Propagation Delay 1.3 2.9 1.3 2.7 ns
tPHL
tR Output Rise Time 1.5 1.5 ns
tF Output Fall Time 1.5 1.5 ns
t
SK(O) Output skew: skew between outputs of all banks of 0.6 0.35 ns
same package (inputs tied together)
t
SK(P) Pulse skew: skew between opposite transitions 0.6 0.45 ns
of same output (|tPHL -– tPLH|)
tSK(T) Package skew: skew between outputs of different 0.9 0.65 ns
packages at same power supply voltage,
temperature, package type and speed grade
50 to VCC/2,
CL = 10pF
(See figure 1)
or 50 ac
termination,
CL = 10pF
(See figure 2)
f 100MHz
Outputs connected in
groups of two
FCT807BT FCT807CT
Symbol Parameter Conditions
(1)
Min.
(2)
Max. Min.
(2)
Max. Unit
t
PLH Propagation Delay 1.5 4 1.5 3.7 ns
tPHL
tR Output Rise Time 1.5 1.5 ns
tF Output Fall Time 1.5 1.5 ns
t
SK(O) Output skew: skew between outputs of all banks of 0.6 0.35 ns
same package (inputs tied together)
t
SK(P) Pulse skew: skew between opposite transitions 0.6 0.45 ns
of same output (|tPHL -– tPLH|)
tSK(T) Package skew: skew between outputs of different 0.9 0.75 ns
packages at same power supply voltage,
temperature, package type and speed grade
CL = 30pF
f 67MHz
(See figure 3)
FCT807BT FCT807CT
Symbol Parameter Conditions
(1)
Min.
(2)
Max. Min.
(2)
Max. Unit
t
PLH Propagation Delay 1.5 4 1.5 3.7 ns
tPHL
tR Output Rise Time 1.5 1.5 ns
tF Output Fall Time 1.5 1.5 ns
t
SK(O) Output skew: skew between outputs of all banks of 0.6 0.45 ns
same package (inputs tied together)
t
SK(P) Pulse skew: skew between opposite transitions 0.7 0.55 ns
of same output (|tPHL -– tPLH|)
tSK(T) Package skew: skew between outputs of different 1 0.75 ns
packages at same power supply voltage,
temperature, package type and speed grade
CL = 30pF
f 40MHz
(See figure 4)
6
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER
Pulse
Generator
R
T
D.U.T.
V CC
V
IN
C
V
OUT
L
50pF
Pulse
Generator
R
T
D.U.T.
V
CC
V
IN
V
OUT
C
L
30pF
Pulse
Generator
R
T
D.U.T.
VCC
V
IN
V
OUT
50
10pF
220pF
Pulse
Generator
R
T
D.U.T.
V CC
V
IN
V
OUT
100
100
10pF
V
CC
Pulse
Generator
R
T
D.U.T.
V
CC
V
IN
C
L
V OUT
50pF
500
500
7.0V
The capacitor value for AC termination is determined by the operating frequency. For
very low frequencies a higher capacitor value should be selected.
TEST CIRCUITS
Fig. 5: Enable and Disable Time Circuit
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Test Switch
Disable LOW 6V
Enable LOW
Disable HIGH GND
Enable HIGH
SWITCH POSITION
Fig. 1: 50
to VCC/2, CL = 10pF
Fig. 2: 50
AC Termination, CL = 10pF
Fig. 3: CL = 30pF Circuit
Fig. 4: CL = 50pF Circuit

74FCT807BTQG8

Mfr. #:
Manufacturer:
IDT
Description:
Clock Drivers & Distribution 1:10 Clock Driver w/ TTL Outputs
Lifecycle:
New from this manufacturer.
Delivery:
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