OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

89HP0508PZBABG

P1-P2
®
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
© 2010 Integrated Device Technology, Inc
1 of 2 August 30, 2010
Device Overview
The IDT 89HP0508P (P0508P) is a 5Gbps PCIe® Repeater device
featuring IDT EyeBoost™ technology that compensates for cable and
board trace attenuations and ISI jitter, thereby extending connection
reach. The device is optimized for PCIe Gen1 and Gen2 high speed
serial data streams and contains eight data channels, each able to
process 5Gbps transmission rates. Each channel consists of an input
equalizer and amplifier, signal detection with glitch filter, as well as
programmable output swing, slew rate, and de-emphasis with delay
control. Since all of these features are user programmable, they allow
for application specific optimization.
Besides the per channel programmable features, the P0508P
provides global programmable settings - termination resistance values
and transfer modes. The P0508P, with its many programmable receiver
and transmitter features, is ideal for PCIe applications using any
combination of cables and board trace materials.
All modes of active data transfer are designed with minimized power
consumption. Also, a wide selection of power reducing modes allows the
user to eliminate power of unused blocks, including a shutdown mode.
In full shutdown mode, the part consumes less than 80mW in worst case
environmental conditions.
Applications
Blade servers, rack servers
PCIe instrumentation
Storage systems
Cabled PCIe devices
Features
Compensates for cable and PCB trace attenuation and ISI
jitter
Programmable receiver equalization up to 30db
Programmable de-emphasis up to -8.5dB
Recovers data stream even when the differential signal eye
is completely closed due to trace attenuation and ISI jitter
Full PCIe protocol support
Configurable via I
2
C interface
Supports automatic download of configuration from
external EEPROM with a single or multiple repeaters on I2C
bus
Leading edge power minimization in active and shutdown
modes
No external bias resistors or reference clocks required
Channel mux mode, demux mode, 1 to 2 channels multicast,
and Z-switch function mode
Available in a 9x9mm 100-ball FPBGA package
Benefits
Extends maximum cable length to over 10 meters and trace
length over 65 inches in PCIe applications
Speeds up system design time by allowing usage of longer
trace and cable lengths
Minimizes BER
89HP0508P
Product Brief
8-Channel 5Gbps Gen2
PCIe® Signal Repeater
Typical Application
Figure 1 IDT Repeaters in Blade Servers
(Trace, Cable)
Server
PCIe gen1,2
IDT
Repeater
PCIe gen1,2
(Trace, eg. FR4)
Server
Chipset
PCIe gen1,2
(Trace, eg. FR4)
Chipset
IDT
Repeater
2 of 2 August 30, 2010
IDT 89HP0508P Product Brief
August 16, 2004August 16, 200
NOT AN OFFER FOR SALE
The information presented herein is subject to a Non-Disclosure Agreement and is for planning purposes only. Nothing contained in this presenta-
tion, whether verbal or written, is intended as, or shall have the effect of, a sale or an offer for sale that creates a contractual power of acceptance.
CORPORATE HEADQUARTERS
6024 Silver Creek Valley Road
San Jose, CA 95138
for SALES:
800-345-7015 or 408-284-8200
fax: 408-284-2775
www.idt.com
for Tech Support:
email: ssdhelp@idt.com
phone: 408-284-8208
®
P0508P PCIe Compliance
The device was designed to provide end users with features needed to comply with PCIe system application requirements:
– Receiver Detection Support, PCIe Beacon Support
– Receiver supports high impedance mode for PCIe
– Jitter, eye opening, and all other AC and DC specifications.
P0508P Block Diagram
The P0508P contains eight high speed channels as shown in Figure 2. Each channel can routed to different outputs. Depending on user
configuration via mode selections, input traffic can be muxed, demuxed, or looped back. Please, refer to modes of operation chapter for details. To
facilitate buffering of system clocks, the repeater provides 1:2 clock buffer as shown in the figure below. Powerdown (PDB) and Receiver Detection
Reset (RSTB) pins are provided for easy state and channel control. Status output pins are available for monitoring critical states, such as the detection
of high speed input signals (A0SIGDET, etc.) and the far-end receiver detection (ARXDETSTAT, etc.).
Each channel’s configuration and performance can be optimized via the I
2
C interface (SCL, SDA). The programming option allows the user to
optimize the repeater's performance in a wide range of applications, making it an ideal solution for most applications requiring cancellation of trace or
cable attenuation and ISI jitter.
Figure 2 P0508P Block Diagram
P1-P2

89HP0508PZBABG

Mfr. #:
Buy 89HP0508PZBABG
Manufacturer:
IDT
Description:
Interface - Signal Buffers, Repeaters SIGNAL INTEGRITY PRODUCT
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet