LTC2241-10
4
224110fb
INTERNAL REFERENCE CHARACTERISTICS
(Note 4)
PARAMETER CONDITIONS MIN TYP MAX UNITS
V
CM
Output Voltage I
OUT
= 0 1.225 1.25 1.275 V
V
CM
Output Tempco ±35 ppm/°C
V
CM
Line Regulation 2.375V < V
DD
< 2.625V 3 mV/V
V
CM
Output Resistance –1mA < I
OUT
< 1mA 2 Ω
DIGITAL INPUTS AND DIGITAL OUTPUTS
The denotes the specifi cations which apply over the
full operating temperature range, otherwise specifi cations are at T
A
= 25°C. (Note 4)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
ENCODE INPUTS (ENC
+
, ENC
)
V
ID
Differential Input Voltage (Note 7)
0.2 V
V
ICM
Common Mode Input Voltage Internally Set
Externally Set (Note 7)
1.2
1.5
1.5 2.0
V
V
R
IN
Input Resistance 4.8
C
IN
Input Capacitance (Note 7) 2 pF
LOGIC INPUTS (OE, SHDN)
V
IH
High Level Input Voltage V
DD
= 2.5V
1.7 V
V
IL
Low Level Input Voltage V
DD
= 2.5V
0.7 V
I
IN
Input Current V
IN
= 0V to V
DD
–10 10 μA
C
IN
Input Capacitance (Note 7) 3 pF
LOGIC OUTPUTS (CMOS MODE)
OV
DD
= 2.5V
C
OZ
Hi-Z Output Capacitance OE = High (Note 7) 3 pF
I
SOURCE
Output Source Current V
OUT
= 0V 37 mA
I
SINK
Output Sink Current V
OUT
= 2.5V 23 mA
V
OH
High Level Output Voltage I
O
= –10μA
I
O
= –500μA
2.495
2.45
V
V
V
OL
Low Level Output Voltage I
O
= 10μA
I
O
= 500μA
0.005
0.07
V
V
OV
DD
= 1.8V
V
OH
High Level Output Voltage I
O
= –500μA 1.75 V
V
OL
Low Level Output Voltage I
O
= 500μA 0.07 V
LOGIC OUTPUTS (LVDS MODE)
V
OD
Differential Output Voltage 100Ω Differential Load
247 350 454 mV
V
OS
Output Common Mode Voltage 100Ω Differential Load
1.125 1.250 1.375 V
LTC2241-10
5
224110fb
POWER REQUIREMENTS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
DD
Analog Supply Voltage (Note 8)
2.375 2.5 2.625 V
P
SLEEP
Sleep Mode Power SHDN = High, OE = High, No CLK 1 mW
P
NAP
Nap Mode Power SHDN = High, OE = Low, No CLK 28 mW
LVDS OUTPUT MODE
OV
DD
Output Supply Voltage (Note 8)
2.375 2.5 2.625 V
I
VDD
Analog Supply Current
226 252 mA
I
OVDD
Output Supply Current
58 70 mA
P
DISS
Power Dissipation
710 805 mW
CMOS OUTPUT MODE
OV
DD
Output Supply Voltage (Note 8)
0.5 2.5 2.625 V
I
VDD
Analog Supply Current (Note 7)
226 252 mA
P
DISS
Power Dissipation 585 mW
The denotes the specifi cations which apply over the full operating temperature
range, otherwise specifi cations are at T
A
= 25°C. (Note 9)
TIMING CHARACTERISTICS
The denotes the specifi cations which apply over the full operating temperature
range, otherwise specifi cations are at T
A
= 25°C. (Note 4)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
f
S
Sampling Frequency (Note 8)
1 210 MHz
t
L
ENC Low Time (Note 7) Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
2.26
1.5
2.38
2.38
500
500
ns
ns
t
H
ENC High Time (Note 7) Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
2.26
1.5
2.38
2.38
500
500
ns
ns
t
AP
Sample-and-Hold Aperture Delay 0.4 ns
t
OE
Output Enable Delay (Note 7)
510 ns
LVDS OUTPUT MODE
t
D
ENC to DATA Delay (Note 7)
1 1.7 2.8 ns
t
C
ENC to CLKOUT Delay (Note 7)
1 1.7 2.8 ns
DATA to CLKOUT Skew (t
C
– t
D
) (Note 7)
–0.6 0 0.6 ns
Rise Time 0.5 ns
Fall Time 0.5 ns
Pipeline Latency 5 Cycles
CMOS OUTPUT MODE
t
D
ENC to DATA Delay (Note 7)
1 1.7 2.8 ns
t
C
ENC to CLKOUT Delay (Note 7)
1 1.7 2.8 ns
DATA to CLKOUT Skew (t
C
– t
D
) (Note 7)
–0.6 0 0.6 ns
Pipeline
Latency
Full Rate CMOS 5 Cycles
Demuxed Interleaved 5 Cycles
Demuxed Simultaneous 5 and 6 Cycles
LTC2241-10
6
224110fb
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to ground with GND and OGND
wired together (unless otherwise noted).
Note 3: When these pin voltages are taken below GND or above V
DD
, they
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above V
DD
without latchup.
Note 4: V
DD
= 2.5V, f
SAMPLE
= 210MHz, LVDS outputs, differential
ENC
+
/ENC
= 2V
P-P
sine wave, input range = 2V
P-P
with differential
drive, unless otherwise noted.
Note 5: Integral nonlinearity is defi ned as the deviation of a code from
a “best straight line” fi t to the transfer curve. The deviation is measured
from the center of the quantization band.
TYPICAL PERFORMANCE CHARACTERISTICS
Note 6: Offset error is the offset voltage measured from –0.5 LSB when
the output code fl ickers between 00 0000 0000 and 11 1111 1111 in 2’s
complement output mode.
Note 7: Guaranteed by design, not subject to test.
Note 8: Recommended operating conditions.
Note 9: V
DD
= 2.5V, f
SAMPLE
= 210MHz, differential ENC
+
/ENC
= 2V
P-P
sine wave, input range = 1V
P-P
with differential drive, output C
LOAD
= 5pF.
Note 10: SNR minimum and typical values are for LVDS mode. Typical
values for CMOS mode are typically 0.2dB lower.
Note 11: SFDR minimum values are for LVDS mode. Typical values are for
both LVDS and CMOS modes.
Note 12: SINAD minimum and typical values are for LVDS mode. Typical
values for CMOS mode are typically 0.2dB lower.
Integral Nonlinearity Differential Nonlinearity
8192 Point FFT, f
IN
= 5MHz,
–1dB, 2V Range, LVDS Mode
(T
A
= 25°C unless otherwise noted, Note 4)
OUTPUT CODE
0
–1.0
INL (LSB)
–0.8
–0.4
–0.2
0
1.0
0.4
256
512
224110 G01
–0.6
0.6
0.8
0.2
768
1024
OUTPUT CODE
0
–1.0
DNL (LSB)
–0.8
–0.4
–0.2
0
1.0
0.4
256
512
224110 G02
–0.6
0.6
0.8
0.2
768
1024
FREQUENCY (MHz)
0
AMPLITUDE (dB)
–80
–20
–10
0
20 40 8060
224110 G03
–100
–40
–60
–90
–30
–110
–50
–70
100

LTC2241CUP-10#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 10-B, 210Msps ADC
Lifecycle:
New from this manufacturer.
Delivery:
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