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MAX1839EEP

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26
MAX1739/MAX1839
†
Wide Brightness Range
CCFL Backlight Controllers
22 ______________________________________________________________________________________
be used to read or write the brightness, SHMD, status,
or ID registers.
Table 6 summarizes the command byte’s register
assignments, as well as each register’s power-on state.
The MAX1739 also supports the receive-byte protocol
for quicker data transfers. This protocol accesses the
register configuration pointed to by the last command
byte. Immediately after power-up, the data byte
returned by the receive-byte protocol is the contents of
the brightness register, left justified (i.e., BRIGHT4 will
be in the MSB position of the data byte) with the
remaining bits containing a 1, STATUS1, and STATUS0.
This gives the same result as using the read-byte proto-
col with a 0b10XXXXXX (0x80) command. Use caution
with shorter protocols in multimaster systems since a
second master could overwrite the command byte with-
out informing the first master. During shutdown, the ser-
ial interface remains fully functional. The part also
supports limited read/write-word protocol. Read-word
works similar to read-byte except the second byte
returned is 0xFF. Write-word also works similar to write-
byte. The second data byte is acknowledged and
updated after the first data byte is acknowledged and
updated.
SMBCLK
AB CD
E
FG H
I
J
K
SMBDATA
t
SU:STA
t
HD:STA
t
LOW
t
HIGH
t
SU:DAT
t
HD:DAT
t
HD:DAT
t
SU:STO
t
BUF
A = START CONDITION
B = MSB OF ADDRESS CLOCKED INTO SLAVE
C = LSB OF ADDRESS CLOCKED INTO SLAVE
D = R/W BIT CLOCKED INTO SLAVE
E = SLAVE PULLS SMBDATA LINE LOW
L
M
F = ACKNOWLEDGE BIT CLOCKED INTO MASTER
G = MSB OF DATA CLOCKED INTO SLAVE
H = LSB OF DATA CLOCKED INTO SLAVE
I = SLAVE PULLS SMBDATA LINE LOW
J = ACKNOWLEDGE CLOCKED INTO MASTER
K = ACKNOWLEDGE CLOCK PULSE
L = STOP CONDITION, DATA EXECUTED BY SLAVE
M = NEW START CONDITION
Figure 12. SMBus Write Timing
SMBCLK
A = START CONDITION
B = MSB OF ADDRESS CLOCKED INTO SLAVE
C = LSB OF ADDRESS CLOCKED INTO SLAVE
D = R/W BIT CLOCKED INTO SLAVE
AB CD
E
FG H
I
J
SMBDATA
t
SU:STA
t
HD:STA
t
LOW
t
HIGH
t
SU:DAT
t
HD:DAT
t
SU:DAT
t
SU:STO
t
BUF
K
E = SLAVE PULLS SMBDATA LINE LOW
F = ACKNOWLEDGE BIT CLOCKED INTO MASTER
G = MSB OF DATA CLOCKED INTO MASTER
H = LSB OF DATA CLOCKED INTO MASTER
I = ACKNOWLEDGE CLOCK PULSE
J = STOP CONDITION
K = NEW START CONDITION
Figure 13. SMBus Read Timing
MAX1739/MAX1839
†
Wide Brightness Range
CCFL Backlight Controllers
______________________________________________________________________________________ 23
Brightness Register
[BRIGHT4–BRIGHT0] (POR = 0b10111)
The 5-bit brightness register corresponds with the 5-bit
brightness code used in the dimming control (see
Dimming Range). BRIGHT4–BRIGHT0 = 0b00000 sets
minimum brightness, and BRIGHT4–BRIGHT0 =
0b11111 sets maximum brightness. The SMBus inter-
face does not control whether the device regulates the
current by analog dimming, DPWM dimming, or both;
this is done by MINDAC (Table 2).
Shutdown-Mode Register
[SHMD2–SHMD0] (POR = 0b001)
The 3-bit shutdown-mode register configures the oper-
ation of the device when the SH/SUS pin is toggled as
described in Table 7. The shutdown-mode register can
also be used to shut off directly the CCFL, regardless
of the SH/SUS state (Table 8).
DATA REGISTER BIT ASSIGNMENT
R OR W
PROTOCOL
COMMAND
BYTE*
POR
STATE
BIT 7
(MSB)
BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1
BIT 0
(LSB)
Read and
Write
0x01
0b0XXX
XX01
0x17
000
BRIGHT4
(MSB)
BRIGHT3 BRIGHT2 BRIGHT1
BRIGHT0
(LSB)
Read and
Write
0x02
0b0XXX
XX10
0xF9 STATUS1 STATUS0
111
SHMD2 SHMD1
SHMD0
Read
Only
0x03
0b0XXX
XX11
0x96
ChipID7
1
ChipID6
0
ChipID5
0
ChipID4
1
ChipID3
0
ChipID2
1
ChipID1
1
ChipID0
0
Read
Only
0x04
0b0XXX
XX00
0x00
ChipRev7
0
ChipRev6
0
ChipRev5
0
ChipRev4
0
ChipRev3
0
ChipRev2
0
ChipRev1
0
ChipRev0
0
Read and
Write
0x40
0b10XX
XXXX
0xBF
BRIGHT4
(MSB)
BRIGHT3 BRIGHT2 BRIGHT1
BRIGHT0
(LSB)
1
STATUS1
STATUS0
Read
Only
0xFE
0b11XX
XXX0
0x4D
MfgID7
0
MfgID6
1
MfgID5
0
MfgID4
0
MfgID3
1
MfgID2
1
MfgID1
0
MfgID0
1
Read
Only
0xFF
0b11XX
XXX1
0x96
ChipID7
1
ChipID6
0
ChipID5
0
ChipID4
1
ChipID3
0
ChipID2
1
ChipID1
1
ChipID0
0
*The hexadecimal command byte shown is recommended for maximum forward compatibility with future MAXIM products.
Table 6. Commands Description
MAX1739/MAX1839
†
Wide Brightness Range
CCFL Backlight Controllers
24 ______________________________________________________________________________________
Status Register
[STATUS1–STATUS0] (POR = 0b11)
The status register returns information on fault condi-
tions. If a lamp is not connected to the secondary of the
transformer, the MAX1739 will detect that the lamp cur-
rent has not exceeded the CSAV detection threshold
and after 2 seconds will clear the STATUS1 bit (see
Lamp-Out Detection). The STATUS1 bit is latched; i.e.,
it will remain 0 even if the lamp-out condition goes
away. When STATUS1 = 0, the lamp is forced off. STA-
TUS0 reports 1 as long as no overcurrent conditions
are detected. If an overcurrent condition is detected in
any given DPWM period, STATUS0 is cleared for the
duration of the following DPWM period. If an overcur-
rent condition is not detected in any given DPWM peri-
od, STATUS0 is set for the duration of the following dig-
ital DPWM period. Forcing the CCFL lamp off by
entering shutdown, writing to the mode register, or by
toggling SH/SUS sets STATUS1.
ID Registers
The ID registers return information on the manufacturer,
the chip ID, and the chip revision number. The
MAX1739 is the first-generation advanced CCFL con-
troller, and its ChipRev is 0x00. Reading from the MfgID
register returns 0x4D, which is the ASCII code for “M”
(for Maxim); the ChipID register returns 0x96. Writing to
these registers has no effect.
BIT
NAME
POR
STATE
DESCRIPTION
2
SHMD2
0
SHMD2 = 1 forces the lamp off and sets STATUS1. SHMD2 = 0 allows the lamp to operate, though it
may still be shut down by the SH/SUS pin (depending on the state of SHMD1 and SHMD0).
1
SHMD1
0
When SH /SUS = 0, this bit has no effect. SH/SUS = 1 and SHMD1 = 1 forces the lamp off and sets
STATUS1. SH /SUS = 1 and SHMD1 = 0 allow the lamp to operate, though it may still be shut down
by the SHMD2 bit.
0
SHMD0
1
When SH /SUS = 1, this bit has no effect. SH /SUS = 0 and SHMD0 = 1 forces the lamp off and sets
STATUS1. SH /SUS = 0 and SHMD0 = 0 allows the lamp to operate, though it may still be shut down
by the SHMD2 bit.
Table 7. SHMD Register Bit Descriptions
SH/SUS SHMD2 SHMD1 SHMD0 OPERATING MODE
0 0 X 0 Operate
0 0 X 1 Shutdown, STATUS1 set
1 0 0 X Operate
1 0 1 X Shutdown, STATUS1 set
X 1 X X Shutdown, STATUS1 set
Table 8. SH/SUS and SHMD Register Truth Table
BIT
NAME
POR
STATE
DESCRIPTION
1
STATUS1
1
STATUS1 = 0 means that a lamp-out condition has been detected. The STATUS1 bit stays clear
even after the lamp-out condition has gone away. The only way to set STATUS1 is to shut off the
lamp by programming the mode register or by toggling SH/SUS.
0
STATUS0
1
STATUS0 = 0 means that an overcurrent condition was detected during the previous digital PWM
period. STATUS0 = 1 means that no overcurrent condition was detected during the previous digital
PWM period.
Table 9. Status Register Bit Descriptions (Read Only/Writes Have No Effect)
X = Don’t care
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26

MAX1839EEP

Mfr. #:
Buy MAX1839EEP
Manufacturer:
Maxim Integrated
Description:
IC CTRLR CCFL BCKLGHT 20-QSOP
Lifecycle:
New from this manufacturer.
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