IS61C64AL ISSI
®
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
Integrated Silicon Solution, Inc. — 1-800-379-4774
1
Rev. B
10/23/06
FEATURES
• High-speed access time: 10 ns
• CMOS low power operation
— 1 mW (typical) CMOS standby
— 125 mW (typical) operating
• TTL compatible interface levels
• Single 5V power supply
• Fully static operation: no clock or refresh
required
• Lead-free available
8K x 8 HIGH-SPEED CMOS STATIC RAM
DESCRIPTION
The ISSI IS61C64AL is a very high-speed, low power,
8192-word by 8-bit static RAM. It is fabricated using ISSI's
high-performance CMOS technology. This highly reliable
process coupled with innovative circuit design techniques,
yields access times as fast as 10 ns with low power
consumption.
When CE is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be
reduced down to 150 µW (typical) with CMOS input levels.
Easy memory expansion is provided by using one Chip
Enable input, CE. The active LOW Write Enable (WE)
controls both writing and reading of the memory.
The IS61C64AL is packaged in the JEDEC standard 28-
pin, 300-mil SOJ, and TSOP.
FUNCTIONAL BLOCK DIAGRAM
A0-A12
CE
OE
WE
8K x 8
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
VDD
I/O
DATA
CIRCUIT
I/O0-I/O7
OCTOBER 2006
