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MAX354EWE+T

P1-P3P4-P6P7-P9P10-P12
MAX354/MAX355
Fault-Protected Analog Multiplexers
_______________________________________________________________________________________ 7
50%
t
OPEN
t
R
< 20ns
t
F
< 20ns
+5V
+3V
0V
LOGIC
INPUT
V
A
SWITCH
OUTPUT
V
OUT
+15V
V
OUT
-15V
GND
V+
A0
V-
A1
A2
EN
NO1–NO8
COM
+10V
50Ω
MAX354
300Ω
35pF
80%
+2.4V
0V
V
A
V
EN
_________________________________Test Circuits/Timing Diagrams (continued)
Figure 3. Break-Before-Make Interval
∆V
OUT
+3V
0V
LOGIC
INPUT
V
EN
+15V
V
OUT
-15V
GND
V+
A1
V-
A0
A2
EN
COM
MAX354
C
L
= 1000nF
V
OUT
NO
CHANNEL
SELECT
R
S
V
S
ONOFF OFF
∆V
OUT
IS THE MEASURED VOLTAGE DUE TO CHARGE TRANSFER
ERROR V
CTE
WHEN THE CHANNEL TURNS OFF.
V
CTE
= ∆V
OUT
x
C
L
V
EN
Figure 4. Charge Injection
MAX354/MAX355
Fault-Protected Analog Multiplexers
8 _______________________________________________________________________________________
_________________________________Test Circuits/Timing Diagrams (continued)
+15V
V
OUT
-15V
GND
V+
A1
V-
A0
A2
NO8
COM
MAX354
NO1
R
S
= 50Ω
V
IN
EN
10nF
R
L
1k
OFF ISOLATION = 20log
V
OUT
V
IN
10nF
+15V
V
OUT
-15V
GND
V+
A1
V-
A0
A2
NO8
COM
MAX354
NO2
R
G
= 50Ω
V
IN
EN
10nF
R
L
1k
CROSSTALK = 20log
V
OUT
V
IN
10nF
NO1
R = 1kΩ
+15V
-15V
GND
V+
A2
V-
A1
A0
NO8
MAX354
CHANNEL
SELECT
NO1
COM
EN
1MHz
CAPACITANCE
ANALYZER
f = 1MHz
Figure 5. Off Isolation Figure 6. Crosstalk
Figure 7. NO/COM Capacitance
_______________Detailed Description
Fault-Protection Circuitry
Maxim’s MAX354/MAX355 are fully fault protected for
continuous input voltages up to ±40V, whether or not
the V+ and V- power supplies are present. These
devices use a “series FET” protection scheme that not
only protects the multiplexer output from overvoltage,
but also limits the input current to sub-microamp levels.
When signal voltages exceed or are within approxi-
mately 1.5V of the supply rails, on-resistance increas-
es. This greater on-resistance limits fault currents and
output voltage, protecting sensitive circuits and com-
ponents. The protected output clamps at approximately
1.5V below the supply rails and maintains the correct
polarity. There are no glitches or polarity reversals
going into or coming out of a fault condition.
Figures 8 and 9 show how the series FET circuit protects
against overvoltage conditions. When power is off, the
gates of all three FETs are at ground. With a -25V input,
N-channel FET Q1 is turned on by the +25V gate-to-
source voltage. The P-channel device (Q2), however,
has +25V V
GS
and is turned off, thereby preventing the
input signal from reaching the output. If the input volt-
age is +25V, Q1 has a negative V
GS
, which turns it off.
Similarly, only sub-microamp leakage currents can flow
from the output back to the input, since any voltage will
turn off either Q1 or Q2.
Figure 10 shows the condition of an off channel with V+
and V- present. As with Figures 8 and 9, either an N-
channel or a P-channel device will be off for any input
voltage from -40V to +40V. The leakage current with
negative overvoltages will immediately drop to a few
nanoamps at +25°C. For positive overvoltages, that
fault current will initially be 10µA or 20µA, decaying
over a few seconds to the nanoamp level. The time
constant of this decay is caused by the discharge of
stored charge from internal nodes and does not com-
promise the fault-protection scheme.
Figure 11 shows the condition of the on channel with
V+ and V- present. With input voltages less than ±10V,
all three FETs are on and the input signal appears at
the output. If the input voltage exceeds V+ minus the
N-channel threshold voltage (V
TN
), the N-channel FET
will turn off. For voltages more negative than V- minus
the P-channel threshold (V
TP
), the P-channel device will
turn off. Since V
TN
is typically 1.5V and V
TP
is typically
3V, the multiplexer’s output swing is limited to about -12V
to +13.5V with ±15V supplies.
Switching Characteristics
and Charge Injection
Table 1 shows typical charge injection levels versus
power-supply voltages and analog input voltage. The
charge injection that occurs during switching creates a
voltage transient whose magnitude is inversely propor-
tional to the capacitance on the multiplexer output.
MAX354/MAX355
Fault-Protected Analog Multiplexers
_______________________________________________________________________________________ 9
G
D
Q1
S
-25V
N-CHANNEL MOSFET
IS TURNED ON
BECAUSE V
GS
= +25V
-25V
OVERVOLTAGE
P-CHANNEL
MOSFET IS OFF
G
D
Q2
S
G
D
Q3
S
Figure 8. -25V Overvoltage with Multiplexer Power Off
+15V-15V -15V
Q1
N-CHANNEL MOSFET
IS TURNED ON
BECAUSE V
GS
= +10V
-25V
OVERVOLTAGE
P-CHANNEL
MOSFET IS OFF
N-CHANNEL
MOSFET IS OFF
+15V FROM
DRIVERS
-15V FROM
DRIVERS
+25V FORCED
ON COMMON
OUTPUT LINE BY
EXTERNAL CIRCUITRY
Q2 Q3
Figure 10. -25V Overvoltage on an Off Channel with
Multiplexer Power Supply On
G
D
Q1
S
N-CHANNEL MOSFET
IS TURNED OFF
BECAUSE V
GS
= -25V
+25V
OVERVOLTAGE
G
D
Q2
S
G
D
Q3
S
Figure 9. +25V Overvoltage with Multiplexer Power Off
+15V-15V -15V
Q1
N-CHANNEL MOSFET
IS TURNED OFF
BECAUSE V
GS
= -10V
+25V
OVERVOLTAGE
13.5V
V
TN
= 1.5V
N-CHANNEL
MOSFET IS ON
-15V FROM
DRIVERS
+15V FROM
DRIVERS
13.5V
OUTPUT
Q2 Q3
Figure 11. +25V Overvoltage Input to the On Channel
Table 1. MAX354 Charge Injection
Test Conditions: C
L
, = 1000pF on mux output; the tabulated
analog input level is applied to channel 1; channels 2–8 inputs
are open circuited. EN = +5V, V
A1
= V
A2
= 0V, V
O
is toggled at
a 2kHz rate between 0V and 3V. +100pC of charge creates a
+100mV step when injected into a 1000pF load capacitance.
Supply Voltage Analog Input Level Injected Charge
±5V
+2V
0V
-2V
52pC
35pC
16pC
±10V
+5V
0V
-5V
105pC
65pC
25pC
±15V
+10V
0V
-10V
180pC
80pC
15pC
P1-P3P4-P6P7-P9P10-P12

MAX354EWE+T

Mfr. #:
Buy MAX354EWE+T
Manufacturer:
Maxim Integrated
Description:
Multiplexer Switch ICs 8:1 Fault-Protected Analog MUX
Lifecycle:
New from this manufacturer.
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