74HC_HCT04_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 10 April 2013 6 of 16
NXP Semiconductors
74HC04-Q100; 74HCT04-Q100
Hex inverter
10. Dynamic characteristics
[1] t
pd
is the same as t
PHL
and t
PLH
.
[2] t
t
is the same as t
THL
and t
TLH
.
[3] C
PD
is used to determine the dynamic power dissipation (P
D
in W):
P
D
=C
PD
V
CC
2
f
i
N+ (C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
I
CC
supply current V
I
= V
CC
or GND; I
O
=0A;
V
CC
=5.5V
--2 - 20 - 40A
I
CC
additional
supply current
per input pin;
V
I
=V
CC
2.1 V; I
O
=0A;
other inputs at V
CC
or GND;
V
CC
= 4.5 V to 5.5 V
- 120 432 - 540 - 590 A
C
I
input
capacitance
-3.5- - - - -pF
Table 6. Static characteristics
…continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
Table 7. Dynamic characteristics
GND = 0 V; C
L
= 50 pF; for load circuit see Figure 7.
Symbol Parameter Conditions 25 C 40 C to +125 C Unit
Min Typ Max Max
(85 C)
Max
(125 C)
74HC04-Q100
t
pd
propagation delay nA to nY; see Figure 6
[1]
V
CC
= 2.0 V - 25 85 105 130 ns
V
CC
= 4.5 V - 9 17 21 26 ns
V
CC
= 5.0 V; C
L
=15pF - 7 - - - ns
V
CC
= 6.0 V - 7 14 18 22 ns
t
t
transition time see Figure 6
[2]
V
CC
= 2.0 V - 19 75 95 110 ns
V
CC
= 4.5 V - 7 15 19 22 ns
V
CC
= 6.0 V - 6 13 16 19 ns
C
PD
power dissipation
capacitance
per package; V
I
=GNDtoV
CC
[3]
-21- - -pF
74HCT04-Q100
t
pd
propagation delay nA to nY; see Figure 6
[1]
V
CC
= 4.5 V - 10 19 24 29 ns
V
CC
= 5.0 V; C
L
=15pF - 8 - - - ns
t
t
transition time V
CC
= 4.5 V; see Figure 6
[2]
- 7 15 19 22 ns
C
PD
power dissipation
capacitance
per package;
V
I
=GNDtoV
CC
1.5 V
[3]
-24- - -pF
74HC_HCT04_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 10 April 2013 7 of 16
NXP Semiconductors
74HC04-Q100; 74HCT04-Q100
Hex inverter
N = number of inputs switching;
(C
L
V
CC
2
f
o
) = sum of outputs.
11. Waveforms
Measurement points are given in Table 8.
V
OL
and V
OH
are typical voltage output levels that occur with the output load.
Fig 6. The input (nA) to output (nY) propagation delay times
mna722
t
PLH
t
PHL
V
M
V
M
90 %
10 %
V
M
V
M
nY output
nA input
V
I
GND
V
OH
V
OL
t
TLH
t
THL
Table 8. Measurement points
Type Input Output
V
M
V
M
74HC04-Q100 0.5V
CC
0.5V
CC
74HCT04-Q100 1.3 V 1.3 V
74HC_HCT04_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 10 April 2013 8 of 16
NXP Semiconductors
74HC04-Q100; 74HCT04-Q100
Hex inverter
Test data is given in Table 9.
Definitions test circuit:
R
T
= termination resistance should be equal to output impedance Z
o
of the pulse generator.
C
L
= load capacitance including jig and probe capacitance.
Fig 7. Load circuitry for measuring switching times
001aah768
t
W
t
W
t
r
t
r
t
f
V
M
V
I
negative
pulse
GND
V
I
positive
pulse
GND
10 %
90 %
90 %
10 %
V
M
V
M
V
M
t
f
V
CC
DUT
R
T
V
I
V
O
C
L
G
Table 9. Test data
Type Input Load Test
V
I
t
r
, t
f
C
L
74HC04-Q100 V
CC
6.0 ns 15 pF, 50 pF t
PLH
, t
PHL
74HCT04-Q100 3.0 V 6.0 ns 15 pF, 50 pF t
PLH
, t
PHL

74HC04BQ-Q100,115

Mfr. #:
Manufacturer:
Nexperia
Description:
Inverters 74HC04BQ-Q100/DHVQFN14/REEL 7
Lifecycle:
New from this manufacturer.
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