ICS4231M-03T

DATASHEET
LOW EMI CLOCK GENERATOR ICS4231-03
IDT™ / ICS™
LOW EMI CLOCK GENERATOR 1
ICS4231-03 REV A 110404
Description
The ICS4231-03 generates a low EMI output clock
from a clock or crystal input. The device uses ICS’
proprietary mix of analog and digital Phase Locked
Loop (PLL) technology to spread the frequency
spectrum of the output, thereby reducing the frequency
amplitude peaks by several dB.
The ICS4231-03 offers four different center and down
spread selections. Refer to the MK1714-01/02 for the
widest selection of input frequencies and multipliers.
ICS offers a complete line of EMI reducing clock
generators. Consult us when you need to remove
crystals and oscillators from your board.
Features
Pin and function compatible to Cypress W42C31-03
Packaged in 8-pin SOIC (Pb free available)
Provides a spread spectrum output clock
Accepts a clock or crystal input and provides same
frequency dithered output
Input clock frequency of 10 to 33 MHz
Peak reduction by 8dB - 14dB typical on 3rd - 19th
odd harmonics
Spread percentage selections of ±1.875%, ±1.0%,
and -2.0%
Operating voltage of 5V
Advanced, low-power CMOS process
Block Diagram
PLL Clock
Synthesis
and Spread
Spectrum
Circuitry
OE#
CLK
GND
VDD
FS1:0
X1/CLKIN
X2
Clock Buffer/
Crystal
Oscillator
ICS4231-03
LOW EMI CLOCK GENERATOR SSCG
IDT™ / ICS™
LOW EMI CLOCK GENERATOR 2
ICS4231-03 REV A 110404
Pin Assignment Output Enable Function Table
0 = connect to GND
1 = connect directly to VDD
Note: OE# pin has an internal pull-down resistor
Frequency Range and Spread Table
Note: FS1:0 have internal pull-up resistors
Pin Descriptions
1
2
3
X1/CLKIN
4
X2
GND
FS1
FS0
VDD
CLKOUT
8
7
6
5
OE#
8 pin (150 mil) SOIC
OE#
(Pin 8)
Output Status
0 Running
1Tri-state
FS1
(Pin 7)
FS0
(Pin 4)
Clock Input
Frequency
(MHz)
Crystal Input
Frequency
(MHz)
Spread Amount
0 0 10-20 10-20
±1.875%
0 1 10-20 10-20 ±1.0%
1 0 20-33 20-25
±1.875%
1 1 20-33 20-25 -2.0%
Pin
Number
Pin
Name
Pin Type Pin Description
1 X1/CLKIN Input Crystal or Clock Input.
2 X2 Output Crystal output. Float for a clock input.
3 GND Power Connect to ground.
4 FS0 Input Select pin for input frequency and spread amount. See table above. Internal
pull up resistor.
5 CLKOUT Output Spread spectrum clock output per table above.
6 VDD Power Connect to 5V.
7 FS1 Input Select pin for input frequency and spread amount. See table above. Internal
pull up resistor.
8 OE# Input Output Enable. Active Low. See table above. Internal pull-down resistor.
ICS4231-03
LOW EMI CLOCK GENERATOR SSCG
IDT™ / ICS™
LOW EMI CLOCK GENERATOR 3
ICS4231-03 REV A 110404
External Components
The ICS4231-03 requires a minimum number of
external components for proper operation.
Decoupling Capacitor
A decoupling capacitor of 0.01µF must be connected
between VDD and GND on pins 6 and 3, as close to
these pins as possible. For optimum device
performance, the decoupling capacitor should be
mounted on the component side of the PCB. Avoid the
use of vias in the decoupling circuit.
Series Termination Resistor
When the PCB trace between the clock output and the
load is over 1 inch, series termination should be used.
To series terminate a 50 trace (a commonly used trace
impedance) place a 33 resistor in series with the clock
line, as close to the clock output pin as possible. The
nominal impedance of the clock output is 20.
value of these capacitors is given by the following
equation:
PCB Layout Recommendations
For optimum device performance and lowest output
phase noise, the following guidelines should be
observed.
1) The 0.01µF decoupling capacitor should be mounted
on the component side of the board as close to the VDD
pin as possible. No vias should be used between the
decoupling capacitor and VDD pin. The PCB trace to
VDD pin should be kept as short as possible, as should
the PCB trace to the ground via.
2) To minimize EMI the 33 series termination resistor,
if needed, should be placed close to the clock output.
3) An optimum layout is one with all components on the
same side of the board, minimizing vias through other
signal layers. Other signal traces should be routed away
from the ICS4231-03. This includes signal traces just
underneath the device, or on layers adjacent to the
ground plane layer used by the device.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS4231-03. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item Rating
Supply Voltage, VDD 7V
All Inputs and Outputs -0.5V to VDD+0.5V
Ambient Operating Temperature 0 to +70° C
Storage Temperature -65 to +150° C
Junction Temperature 125° C
Soldering Temperature 260° C

ICS4231M-03T

Mfr. #:
Manufacturer:
Description:
IC CLOCK GENERATOR LOW EMI 8SOIC
Lifecycle:
New from this manufacturer.
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