OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

LTC1296DISW#TRPBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P28
13
LTC1293/LTC1294/LTC1296
129346fs
MSB-First/LSB-First (MSBF)
The output data of the LTC1293/4/6 is programmed for
MSB-first or LSB-first sequence using the MSB bit. When
the MSBF bit is a logical one, data will appear on the D
OUT
line in MSB-first format. Logical zeroes will be filled in
indefinitely following the last data bit to accommodate
longer word lengths required by some microprocessors.
When the MSBF bit is a logical zero, LSB first data will
follow the normal MSB first data on the D
OUT
line. In the
bipolar mode the sign bit will fill in after the MSB bit for
MSBF = 0 (see Operating Sequence).
Power Shutdowns (PS)
The power shutdown feature of the LTC1293/4/6 is acti-
vated by making the PS bit a logical zero. If CS remains low
after the PS bit has been received, a 12-bit D
OUT
word with
Example 2: The same conditions as Example 1 except
COM = 1V. The resulting input span is 1V ≤ IN
+
≤ 4V. Note
if IN
+
≥ 4V the resulting D
OUT
word is all 1’s. If IN
+
≤ 1V
then the resulting D
OUT
word is all 0’s.
Example 3: Let V
CC
= 5V, V
–
= –5V, REF
+
= 4V, REF
–
= 1V
and COM = 1V. Bipolar mode of operation. The resulting
input span is –2V ≤ IN
+
≤ 4V.
For differential input configurations with the same condi-
tions as in the above three examples the resulting input
spans are as follows:
Example 1 (Diff.): IN
–
≤ IN
+
≤ IN
–
+ 3V.
Example 2 (Diff.): IN
–
≤ IN
+
≤ IN
–
+ 3V.
Example 3 (Diff.): IN
–
– 3V ≤ IN
+
≤ IN
–
+ 3V.
U
S
A
O
PP
L
IC
AT
I
WU
U
I FOR ATIO
Operating Sequence
Example: Differential Inputs (CH4
+
, CH5
–
), Unipolar Mode
LTC1293 AI05
MSB-FIRST DATA (MSBF = 0)
MSB-FIRST DATA (MSBF = 1)
t
CYC
CS
D
IN
D
OUT
START
SEL1
UNI
PS
SGL/
DIFF
ODD/
SIGN
MSBF
t
CONV
t
SMPL
SEL0
HI-Z
FILLED WITH ZEROES
DON'T CARE
CLK
DON'T
CARE
B0B1
B11
CLK
DON'T
CARE
t
CYC
CS
D
IN
START
SEL1
UNI
PS
SGL/
DIFF
ODD/
SIGN
MSBFSEL0
DON'T CARE
D
OUT
t
CONV
t
SMPL
HI-Z
B11
B1
B0
B1
B11
FILLED WITH
ZEROES
14
LTC1293/LTC1294/LTC1296
129346fs
PART NUMBER TYPE OF INTERFACE
Motorola
MC6805S2, S3 SPI
MC68HC11 SPI
MC68HC05 SPI
RCA
CDP68HC05 SPI
Hitachi
HD6305 SCI Synchronous
HD6301 SCI Synchronous
HD63701 SCI Synchronous
HD6303 SCI Synchronous
HD64180 SCI Synchronous
National Semiconductor
COP400 Family MICROWIRE
†
COP800 Family MCROWIRE/PLUS
†
NS8050U MICROWIRE/PLUS
HPC16000 Family MICROWIRE/PLUS
Texas Instruments
TMS7002 Serial Port
TMS7042 Serial Port
TMS70C02 Serial Port
TMS70C42 Serial Port
TMS32011* Serial Port
TMS32020* Serial Port
TMS370C050 SPI
U
S
A
O
PP
L
IC
AT
I
WU
U
I FOR ATIO
Power Shutdown Operating Sequence
Example: Differential Inputs (CH4
+
, CH5
–
), Unipolar Mode and MSB-First Data
all logical ones will be shifted out followed by logical
zeroes till CS goes high. Then the D
OUT
line will go into its
high impedance state. The LTC 1293/4/6 will remain in the
shutdown mode till the next CS cycle. There is no warm-
up or wait period required after coming out of the power
shutdown cycle so a conversion can commence after CS
goes low (see Power Shutdown Operating Sequence). The
LTC1296 has a System Shutdown Output pin (SSO) which
will go low when power shutdown is activated. The pin will
stay low till next CS cycle.
Microprocessor Interfaces
The LTC1293/4/6 can interface directly (without external
hardware) to most popular microprocessors (MPU) syn-
chronous serial formats (see Table 1). If an MPU without
a dedicated serial port is used, then three of the MPU’s
parallel port lines can be programmed to form the serial
link to the LTC1293/4/6. Included here are one serial
interface example and one example showing a parallel
port programmed to form the serial interface.
Microprocessor Interfaces
The LTC1293/4/6 can interface directly (without external
hardware) to most popular microprocessors (MPU) syn-
chronous serial formats (see Table 1). If an MPU without
a dedicated serial port is used, then three of the MPU’s
parallel port lines can be programmed to form the serial
link to the LTC1293/4/6.
* Requires external hardware
** Contact factory for interface information for processors not on this list
†
MICROWIRE and MICROWIRE/PLUS are trademarks of National
Semiconductor Corp.
Table 1. Microprocessor with Hardware Serial Interfaces Compat-
ible with the LTC1293/4/6**
D
IN
LTC1293 AI06
SHUTDOWN*
REQUEST POWER SHUTDOWN
NEW CONVERSION BEGINS
PS
MSBF
UNI
SEL0
ODD/
SIGN
SEL1/
DIFF
SEL1
START
DON'T CARE
PSUNI
SEL0
ODD/
SIGN
SEL1/
DIFF
SEL1
START
MSBF
B0
B11
• • • • • • • • • •
HI-Z
D
OUT
FILLED
WITH
ZEROES
HI-Z
CLK
CS
*STOPPING THE CLOCK WILL HELP REDUCE POWER CONSUMPTION.
CS CAN BE BROUGHT HIGH ONCE THE DIN WORD HAS BEEN CLOCKED IN.
15
LTC1293/LTC1294/LTC1296
129346fs
Interfacing to the Parallel Port of the Intel 8051 Family
The Intel 8051 has been chosen to show the interface
between the LTC1293/4/6 and parallel port microproces-
sors. Usually the signals CS, D
IN
and CLK are generated
on three port lines and the D
OUT
signal is read on a fourth
port line. This works very well. One can save a line by tying
the D
IN
and D
OUT
lines together. The 8051 first sends the
start bit and D
IN
to the LTC1294 over the line connected to
P1.2. Then P1.2 is reconfigured as an input and the 8051
reads back the 12-bit A/D result over the same data line.
U
S
A
O
PP
L
IC
AT
I
WU
U
I FOR ATIO
Data Exchange Between LTC1294 and MC68HC11
Motorola SPI (MC68HC11)
The MC68HC11 has been chosen as an example of an MPU
with a dedicated serial port. This MPU transfers data MSB-
first and in 8-bit increments. The D
IN
word sent to the data
register starts the SPI process. With three 8-bit transfers,
the A/D result is read into the MPU. The second 8-bit
transfer clocks B11 through B8 of the A/D conversion
result into the processor. The third 8-bit transfer clocks
the remaining bits B7 through B0 into the MPU. The data
is right justified in the two memory locations. ANDing the
second byte with 0D
HEX
clears the four most significant
bits. This operation was not included in the code. It can
be inserted in the data gathering loop or outside the loop
when the data is processed.
Hardware and Software Interface to Motorola MC68HC11
CS
CLK
D
OUT
MPU
RECEIVED
WORD
LTC1293 TD01
UNI
SGL/
DIFF
ODD/
EVEN
SEL
1
SEL
0
START
MSBF PS
B3B7
B6
B5
B4 B2 B0
B1
B11 B10 B9 B8
D
IN
MPU
TRANSMIT
WORD
BYTE 3 (DUMMY)
BYTE 2
SGL
0
ODD
SEL
0
SEL
1
BYTE 1
XUNI
MSBF
PS
X
X
X
X
00
1
START
X
X
X
XX
X
X
X
BYTE 3
BYTE 2
?
?
?
?
?
BYTE 1
B11?
?
?
0
B10
B8
B9
???
B7
B6
B4
B5 B3
B2
B0
B1
DON'T CARE
LTC1293 TD01a
CLK
D
OUT
LTC1294
CS
ANALOG
INPUTS
DO
SCK
MISO
MC68HC11
D
IN
MOSI
B2 B1
B0
B3
B4
B6
B7 B5
BYTE 1
B10 B9 B8B11
OO
OO
D
OUT
FROM LTC1294 STORED ON MC68HC11 RAM
BYTE 2
LSB
MSB
#62
#63
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P28

LTC1296DISW#TRPBF

Mfr. #:
Buy LTC1296DISW#TRPBF
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 12-Bit 8/Ch Serial ADC w/SSO
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet