PM50CLA120

MITSUBISHI <INTELLIGENT POWER MODULES>
PM50CLA120
FLAT-BASE TYPE
INSULATED PACKAGE
May 2005
V
D = 15V
Detect T
j of IGBT chip
20 T
j 125°C
V
D = 15V, VFO = 15V (Note-2)
V
D = 15V (Note-2)
V
th(ON)
Vth(OFF)
SC
t
off(SC)
OT
OT
r
UV
UV
r
IFO(H)
IFO(L)
tFO
Trip level
Reset level
Trip level
Reset level
20 T
j 125°C, VD = 15V (Fig. 3,6)
V
D = 15V (Fig. 3,6)
3.5
3.5
Main terminal screw : M5
Mounting part screw : M5
Symbol
Parameter
Mounting torque
Mounting torque
Weight
Condition
Unit
N m
N m
g
Limits
Min.
Typ.
Max.
2.5
2.5
3.0
3.0
380
MECHANICAL RATINGS AND CHARACTERISTICS
VD = 15V, VCIN = 15V
Applied between : U
P-VUPC, VP-VVPC, WP-VWPC
UN VN WN-VNC
ID
°C
V
mA
ms
25
10
1.8
2.3
12.5
0.01
15
mA
Circuit Current
Input ON Threshold Voltage
Input OFF Threshold Voltage
Short Circuit Trip Level
Short Circuit Current Delay
Time
Over Temperature Protection
Supply Circuit Under-Voltage
Protection
Fault Output Current
Minimum Fault Output Pulse
Width
CONTROL PART
1.2
1.7
100
135
11.5
1.0
Parameter
Symbol
Condition
Max.
Min. Typ.
Unit
Limits
15
5
1.5
2.0
0.2
145
125
12.0
12.5
10
1.8
(Note-2) Fault output is given only when the internal SC, OT & UV protections schemes of either upper or lower arm device operate to
protect it.
V
µs
VN1-VNC
V*P1-V*PC
A
RECOMMENDED CONDITIONS FOR USE
Recommended value
Unit
Condition
Symbol Parameter
V
Applied across P-N terminals
Applied between : V
UP1-VUPC, VVP1-VVPC
VWP1-VWPC, VN1-VNC (Note-3)
Applied between : U
P-VUPC, VP-VVPC, WP-VWPC
UN VN WN-VNC
Using Application Circuit of Fig. 8
For IPMs each input signals (Fig. 7)
Supply Voltage
Control Supply Voltage
Input ON Voltage
Input OFF Voltage
PWM Input Frequency
Arm Shoot-through
Blocking Time
800
15.0 ± 1.5
0.8
9.0
20
2.5
VCC
VCIN(ON)
VCIN(OFF)
fPWM
tdead
VD
V
V
kHz
µs
(Note-3) With ripple satisfying the following conditions: dv/dt swing ±5V/µs, Variation 2V peak to peak
MITSUBISHI <INTELLIGENT POWER MODULES>
PM50CLA120
FLAT-BASE TYPE
INSULATED PACKAGE
May 2005
PRECAUTIONS FOR TESTING
1. Before appling any control supply voltage (V
D), the input terminals should be pulled up by resistores, etc. to their corre-
sponding supply voltage and each input signal should be kept off state.
After this, the specified ON and OFF level setting for each input signal should be done.
2. When performing SC tests, the turn-off surge voltage spike at the corresponding protection operation should not be al-
lowed to rise above V
CES rating of the device.
(These test should not be done by using a curve tracer or its equivalent.)
10%
90%
trr
Irr
trtd (on)
tc (on) tc (off)
td (off)
V
CIN
Ic
V
CE
10%
10% 10%
90%
tf
(ton= td (on) + tr) (toff= td (off) + tf)
P, (U,V,W)
U,V,W, (N) U,V,W, (N)
V
D (all)
IN
Fo
Fo
Fo
IN
Fo
VD (all)
V
CIN
(0V)
Ic
V V
P, (U,V,W)
V
CIN
(15V)
Ic
P
N
N
C
S
C
S
U,V,W
Vcc
Vcc
Ic
Ic
V
D
(all)
V
D
(all)
P
U,V,W
V
CIN
V
CIN
V
CIN
(15V)
V
CIN
(15V)
Fo
Fo
Fig. 3 Switching time and SC test circuit Fig. 4 Switching time test waveform
Fig. 1 V
CE(sat)
Test Fig. 2 V
EC
Test
a) Lower Arm Switching
Signal input
(Upper Arm)
Signal input
(Lower Arm)
Signal input
(Upper Arm)
Signal input
(Lower Arm)
b) Upper Arm Switching
V
CIN
Fig. 7 Dead time measurement point example
Fig. 5 I
CES Test
Fig. 6 SC test waveform
SC
Short Circuit Current
toff(SC)
V
D
(all)
U,V,W, (N)
P, (U,V,W)
A
Pulse
V
CE
V
CIN
(15V)
Ic
Fo
IN
Fo
0V
1.5V 1.5V
1.5V
2V
2V
2V
0V
t
t
t
dead
t
dead
t
dead
1.5V: Input on threshold voltage Vth(on) typical value, 2V: Input off threshold voltage Vth(off) typical value
IPM input signal V
CIN
(Upper Arm)
IPM input signal V
CIN
(Lower Arm)
Constant Current
MITSUBISHI <INTELLIGENT POWER MODULES>
PM50CLA120
FLAT-BASE TYPE
INSULATED PACKAGE
May 2005
NOTES FOR STABLE AND SAFE OPERATION ;
Design the PCB pattern to minimize wiring length between opto-coupler and IPMs input terminal, and also to minimize the
stray capacity between the input and output wirings of opto-coupler.
Connect low impedance capacitor between the Vcc and GND terminal of each fast switching opto-coupler.
Fast switching opto-couplers: tPLH, tPHL 0.8µs, Use High CMR type.
Slow switching opto-coupler: CTR > 100%
Use 4 isolated control power supplies (VD). Also, care should be taken to minimize the instantaneous voltage charge of the
power supply.
Make inductance of DC bus line as small as possible, and minimize surge voltage using snubber capacitor between P and N
terminal.
Use line noise filter capacitor (ex. 4.7nF) between each input AC line and ground to reject common-mode noise from AC line
and improve noise immunity of the system.
: Interface which is the same as the U-phase
Fig. 8 Application Example Circuit
OUT
Si
OT
OT
OT
OT
OT
OT
GNDGND
In
Vcc
U
V
W
NC
N
P
M
IF
+
OUT
Si
GNDGND
In
Vcc
OUT
Si
GNDGND
In
Vcc
OUT
Si
GNDGND
In
Fo
Fo
Fo
Fo
Vcc
OUT
Si
GNDGND
In
Fo
Vcc
OUT
Si
GND
GND
In
Fo
Vcc
VWP1
WP
VWPC
UN
VN
VN1
WN
VNC
1.5k
1.5k
1.5k
1.5k
Fo
VVP1
VP
VVPC
0.1µ
1k
0.1µ
0.1µ
20k
20k
20k
10µ
10µ
10µ
20k
10µ
0.1µ
VFo
WFo
UFo
VUP1
UP
VUPC
NC
IF
IF
IF
5V
V
D
V
D
V
D
V
D

PM50CLA120

Mfr. #:
Manufacturer:
Description:
MOD IPM L-SER 6PAC IPM 1200V 50A
Lifecycle:
New from this manufacturer.
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