74ABT08 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2 — 14 March 2014 4 of 14
NXP Semiconductors
74ABT08
Quad 2-input AND gate
8. Recommended operating conditions
9. Static characteristics
[1] Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
[2] This is the increase in supply current for each input at 3.4 V.
Table 5. Operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
V
CC
supply voltage 4.5 - 5.5 V
V
I
input voltage 0 - V
CC
V
V
IH
HIGH-level input voltage 2.0 - - V
V
IL
LOW-level input voltage - - 0.8 V
I
OH
HIGH-level output current 15--mA
I
OL
LOW-level output current - - 20 mA
t/V input transition rise and fall rate 0 - 5 ns/V
T
amb
ambient temperature in free air 40 - +85 C
Table 6. Static characteristics
Symbol Parameter Conditions 25 C 40 C to +85 C Unit
Min Typ Max Min Max
V
IK
input clamping voltage V
CC
= 4.5 V; I
IK
= 18 mA 1.2 0.9 - 1.2 - V
V
OH
HIGH-level output
voltage
V
CC
= 4.5 V; I
OH
= 15 mA;
V
I
=V
IL
or V
IH
2.5 2.9 - 2.5 - V
V
OL
LOW-level output
voltage
V
CC
= 4.5 V; I
OL
=20mA;
V
I
=V
IL
or V
IH
- 0.35 0.5 - 0.5 V
I
I
input leakage current V
CC
=5.5V; V
I
= GND or 5.5 V - 0.01 1.0 - 1.0 A
I
OFF
power-off leakage
current
V
CC
= 0 V; V
I
or V
O
4.5 V - 5.0 100 - 100 A
I
CEX
output high leakage
current
HIGH-state; V
O
=5.5V;
V
CC
=5.5V; V
I
=GNDor V
CC
-5.050 - 50A
I
O
output current V
CC
= 5.5 V; V
O
= 2.5 V
[1]
50 75 180 50 180 mA
I
CC
supply current V
CC
= 5.5 V; V
I
= GND or V
CC
-250 - 50A
I
CC
additional supply
current
per input pin; V
CC
= 5.5 V;
one input at 3.4 V;
other inputs at V
CC
or GND
[2]
-0.25500 - 500A
C
I
input capacitance V
I
=0Vor V
CC
-3- - -pF
74ABT08 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2 — 14 March 2014 5 of 14
NXP Semiconductors
74ABT08
Quad 2-input AND gate
10. Dynamic characteristics
[1] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
11. Waveforms
Table 7. Dynamic characteristics
GND = 0 V; for test circuit, see Figure 7.
Symbol Parameter Conditions 25 C; V
CC
= 5.0 V 40 C to +85 C;
V
CC
= 5.0 V 0.5 V
Unit
Min Typ Max Min Max
t
PLH
LOW to HIGH
propagation delay
nA, nB to nY; see Figure 6 1.0 2.4 3.4 1.0 4.0 ns
t
PHL
HIGH to LOW
propagation delay
nA, nB to nY; see Figure 6 1.0 1.9 2.8 1.0 3.0 ns
t
sk(o)
output skew time
[1]
- 0.4 0.5 - 0.5 ns
V
M
= 1.5 V
V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 6. Propagation delay input (nA, nB) to output (nY) and output skew time
PQD
Q$Q%LQSXW
Q<RXWSXW
W
3/+
W
3+/
*1'
9
,
9
0
9
0
9
2+
9
2/
74ABT08 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2 — 14 March 2014 6 of 14
NXP Semiconductors
74ABT08
Quad 2-input AND gate
a. Input pulse definition b. Test circuit
Test data is given in Table 8.
R
L
= Load resistance.
C
L
= Load capacitance including jig and probe capacitance.
R
T
= Termination resistance should be equal to output impedance Z
o
of the pulse generator.
V
EXT
= External voltage for measuring switching times.
Fig 7. Test circuit for measuring switching times
9
(;7
9
&&
9
,
9
2
PQD
'87
&
/
5
7
5
/
5
/
*
Table 8. Test data
Input Load V
EXT
V
I
f
i
t
W
t
r
, t
f
C
L
R
L
t
PHL
, t
PLH
3.0 V 1 MHz 500 ns 2.5 ns 50 pF 500 open

74ABT08N,112

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Logic Gates QUAD 2-INPUT AND
Lifecycle:
New from this manufacturer.
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