AD9941
Rev. 0 | Page 13 of 16
VARIABLE GAIN AMPLIFIER
The VGA stage can be programmed to either 0 dB or 6 dB using
the OPERATION MODE register. The 6 dB gain setting is needed
to match a 1 V input signal with the ADC full-scale range of 2 V.
The 0 dB gain setting can be used with the AD9940 CDS front
end component, which has a 2 V differential output range. Note
that the OB correction range is different for each gain setting, as
outlined in
Table 3.
ADC
The AD9941 uses a high performance ADC architecture,
optimized for high speed and low power. Differential
nonlinearity (DNL) performance is typically better than
0.5 LSB. The ADC uses a 2 V input range.
OPTICAL BLACK CLAMP
The optical black clamp loop is used to remove residual offsets
in the signal chain and to track low frequency variations in the
imager’s black level. During the optical black (shielded) pixel
interval on each line, the ADC output is compared with a fixed
black level reference, selected by the user in the CLAMPLEVEL
register. The value can be programmed between 0 LSB and
1020 LSB in 256 steps. The resulting error signal is filtered to
reduce noise, and the correction value is applied to the ADC
input through a digital-to-analog converter. Normally, the
optical black clamp loop is turned on once per horizontal line,
but this loop can be updated more slowly to suit a particular
application. If external digital clamping is used during the
postprocessing, the AD9941 optical black clamping can be
disabled using the CLPDISABLE register.
The CLPOB pulse should be placed during the imager’s optical
black pixels. It is recommended that the CLPOB pulse duration
be at least 20 pixels wide to minimize clamp noise. Shorter pulse
widths can be used, but clamp noise may increase and the
ability to track low frequency variations in the black level will
be reduced.
