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ADP3110AKCPZ-RL

P1-P3P4-P6P7-P8
© Semiconductor Components Industries, LLC, 2008
August, 2008 − Rev. 4
1 Publication Order Number:
ADP3110A/D
ADP3110A
Dual Bootstrapped, 12 V
MOSFET Driver with Output
Disable
The ADP3110A is a single Phase 12 V MOSFET gate drivers
optimized to drive the gates of both high−side and low−side power
MOSFETs in a synchronous buck converter. The high−side and
low−side driver is capable of driving a 3000 pF load with a 25 ns
propagation delay and a 30 ns transition time.
With a wide operating voltage range, high or low side MOSFET
gate drive voltage can be optimized for the best efficiency. Internal
adaptive nonoverlap circuitry further reduces switching losses by
preventing simultaneous conduction of both MOSFETs.
The floating top driver design can accommodate VBST voltages as
high as 35 V, with transient voltages as high as 40 V. Both gate outputs
can be driven low by applying a low logic level to the Output Disable
(OD
) pin. An Undervoltage Lockout function ensures that both driver
outputs are low when the supply voltage is low, and a Thermal
Shutdown function provides the IC with overtemperature protection.
Features
• All−In−One Synchronous Buck Driver
• Bootstrapped High−Side Drive
• One PWM Signal Generates Both Drives
• Anticross Conduction Protection Circuitry
• OD for Disabling the Driver Outputs Meets CPU VR Requirement
when Used with Patented FlexModet Controller
• These are Pb−Free Devices
Applications
• Multiphase Desktop CPU Supplies
• Single−Supply Synchronous Buck Converters
Device Package Shipping
†
ORDERING INFORMATION
SO−8
(Pb−Free)
98 Units / RailADP3110AKRZ
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
MARKING
DIAGRAMS
PIN CONNECTIONS
SO−8
D SUFFIX
CASE 751
1
8
DRVLV
CC
18
PGNDOD
SWNIN
DRVHBST
http://onsemi.com
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
3110A
ALYW
G
1
8
DFN8
MN SUFFIX
CASE 506BJ
DRVLV
CC
PGNDOD
SWNIN
DRVHBST
(Top View)
18
SO−8
(Pb−Free)
2500 Tape & ReelADP3110AKRZ−RL
DFN8
(Pb−Free)
5000 Tape & ReelADP3110AKCPZ−RL
1
L3E
ALYWG
G
1 8
ADP3110A
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2
Figure 1. Block Diagram
8
1
4
7
5
6
2
3
V
CC
DRVH
BST
SWN
DRVL
PGND
OD
IN
TSD
UVLO
V
CC
MONITOR
FALLING
EDGE
DELAY
MONITOR
FALLING
EDGE
DELAY
NON−OVERLAP
TIMERS
MIN DRVL
OFF TIMER
START STOP
PIN DESCRIPTION
SO−8 DFN8 Symbol Description
1 1 BST Upper MOSFET Floating Bootstrap Supply. A capacitor connected between BST and SW pins holds
this bootstrap voltage for the high−side MOSFET as it is switched. The recommended capacitor value
is between 100 nF and 1.0 mF. An external diode is required with the ADP3110A.
2 2 IN Logic−Level Input. This pin has primary control of the drive outputs.
3 3 OD Output Disable. When low, normal operation is disabled forcing DRVH and DRVL low.
4 4 V
CC
Input Supply. A 1.0 mF ceramic capacitor should be connected from this pin to PGND.
5 5 DRVL Output drive for the lower MOSFET.
6 6 PGND Power Ground. Should be closely connected to the source of the lower MOSFET.
7 7 SWN Switch Node. Connect to the source of the upper MOSFET.
8 8 DRVH Output drive for the upper MOSFET.
ADP3110A
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3
MAXIMUM RATINGS
Rating Value Unit
Operating Ambient Temperature, T
A
0 to 85 °C
Operating Junction Temperature, T
J
(Note 1) 0 to 150 °C
Package Thermal Resistance: SO−8
Junction−to−Case, R
q
JC
Junction−to−Ambient, R
q
JA
(2−Layer Board)
Package Thermal Resistance: DFN8 (Note 2)
Junction−to−Case, R
q
JC
(From die to exposed pad)
Junction−to−Ambient, R
q
JA
45
123
7.5
55
°C/W
°C/W
°C/W
°C/W
Storage Temperature Range, T
S
−65 to 150 °C
Lead Temperature Soldering (10 sec): Reflow (SMD styles only) Pb−Free (Note 3) 260 peak °C
JEDEC Moisture Sensitivity Level SO−8 (260 peak profile) 1 −
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Internally limited by thermal shutdown, 150°C min.
2. 2 layer board, 1 in
2
Cu, 1 oz thickness.
3. 60−180 seconds minimum above 237°C.
NOTE: This device is ESD sensitive. Use standard ESD precautions when handling.
MAXIMUM RATINGS
Pin Symbol Pin Name V
MAX
V
MIN
V
CC
Main Supply Voltage Input 15 V −0.3 V
PGND Ground 0 V 0 V
BST Bootstrap Supply Voltage Input 35 V wrt/PGND
40 V < 50 ns wrt/PGND
15 V wrt/SW
−0.3 V wrt/SW
SW Switching Node
(Bootstrap Supply Return)
35 V
40 V < 50 ns
−5.0 V
−10 V < 200 ns
DRVH High−Side Driver Output BST + 0.3 V −0.3 V wrt/SW
− 2.0 V < 200 ns wrt/SW
DRVL Low−Side Driver Output V
CC
+ 0.3 V −0.3 V DC
−5.0 V < 200 ns
IN DRVH and DRVL Control Input 6.5 V −0.3 V
OD Output Disable 6.5 V −0.3 V
NOTE: All voltages are with respect to PGND except where noted.
P1-P3P4-P6P7-P8

ADP3110AKCPZ-RL

Mfr. #:
Buy ADP3110AKCPZ-RL
Manufacturer:
ON Semiconductor
Description:
Gate Drivers 2 12V FET DRVR W/OUT DIS
Lifecycle:
New from this manufacturer.
Delivery:
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