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93716BFLF

P1-P3P4-P6P7-P9P10-P12P13-P13
Integrated
Circuit
Systems, Inc.
ICS93716
0420H—09/10/08
Block Diagram
Low Cost DDR Phase Lock Loop Clock Driver
Pin Configuration
28-Pin SSOP and TSSOP
Recommended Application:
DDR Clock Driver
Product Description/Features:
• Low skew, low jitter PLL clock driver
•I
2
C for functional and output control
• Feedback pins for input to output synchronization
• Spread Spectrum tolerant inputs
• Bypass mode on B revision only
Switching Characteristics:
• PEAK - PEAK jitter (66MHz): <75ps
• CYCLE - CYCLE jitter (>100MHz):<65ps
• OUTPUT - OUTPUT skew: <100ps
• Output Rise and Fall Time: 550ps - 950ps
Functionality
STUPNISTUPTUO
etatSLLP
DDVATNI_KLCCNI_KLCTKLCCKLCTTUO_BFCTUO_BF
V5.2
)mon(
LHLHLH no
V5.2
)mon(
HLHLHL no
V5.2
)mon(
zHM02<ZZZZffo
DNGL HLHL H ffo/de
ssapyB
DNGH LHLH L ffo/dessapyB
FB_INT
FB_INC
CLK_INC
CLK_INT
SCLK
S DATA
Control
Logic
FB_OUTT
FB_OUTC
CLKT0
CLKT1
CLKT2
CLKT3
CLKT4
CLKT5
CLKC0
CLKC1
CLKC2
CLKC3
CLKC4
CLKC5
PLL
CLKC0
CLKT0
VDD
CLKT1
CLKC1
GND
SCLK
CLK_INT
CLK_INC
VDDA
GND
VDD
CLKT2
CLKC2
GND
CLKC5
CLKT5
CLKC4
CLKT4
VDD
S DATA
FBINC
FBINT
FB_OUTT
FB_OUTC
CLKT3
CLKC3
GND
ICS93716
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
2
ICS93716
0420H—09/10/08
Pin Descriptions
REBMUNNIPEMANNIPEPYTNOITPIRCSED
82,51,11,6DNGRWPdnuorG
1,5,41,61,52,72)0:5(CKLCTUO.stuptuoriaplaitnereffidfoskco
lc"yratnemelpmoC"
2,4,31,71,42,62)0:5(TKLCTUO.stuptuoriaplaitnereffidfokcolC"eurT"
32,21,3DDVRWPV5.2ylppusrew
oP
7
KLCSNIIfotupnikcolC
2
tupnitnarelotV5,tupniC
8TNI_KLCNItupnikcolcecnerefer"eurT"
9CNI_KLCNItupnikcolcecnerefer"yratnemelpmoC"
01ADDVRWPV5.2,ylppusrewopgolanA
81CTUO_BFTUO
tI.kcabdeeflanretxerofdetacided,tuptuokcabdeeF"yratnemelpmoC"
deriwebtsumtuptuosihT.KLCehtsaycneuqerfemasehttasehctiws
.CNI_BFot
91TTUO_BFTUO
sehctiwstI.kcabdeeflanretxerofdetacided,tuptuokcabdeeF""
eurT"
otderiwebtsumtuptuosihT.KLCehtsaycneuqerfemasehtta
.TNI_BF
02TNI_BFNI
rofLLPlanretniehtotlangiskcabde
efsedivorp,tupnikcabdeeF"eurT"
.rorreesahpetanimileotTNI_KLChtiwnoitazinorhcnys
12CNI_BFNI
LLPlanretniehto
tlangissedivorp,tupnikcabdeeF"yratnemelpmoC"
.rorreesahpetanimileotCNI_KLChtiwnoitazinorhcnysrof
22
ATADSNIIroftupniataD
2
tupnitnarelotV5,tupnilairesC
3
ICS93716
0420H—09/10/08
Byte 0: Output Control
(1= enable, 0 = disable)
TIB#NIPDWPNOITPIRCSED
7tiB-X devreseR
6tiB61,711 3CKLC,3TKLC
5tiB-X devreseR
4tiB-X devreseR
3tiB-X devreseR
2tiB-X devreseR
1tiB-X devrese
R
0tiB-X devreseR
Byte 1: Output Control
(1= enable, 0 = disable)
TIB#NIPDWPNOITPIRCSED
7tiB-X devreseR
6tiB-X devreseR
5tiB-X devreseR
4tiB-X devreseR
3tiB-X devreseR
2tiB-X devreseR
1tiB-X devreseR
0tiB-X dev
reseR
Byte 3: Reserved
(1= enable, 0 = disable)
TIB#NIPDWPNOITPIRCSED
7tiB-X devreseR
6tiB-X devreseR
5tiB-X devreseR
4tiB-X devreseR
3tiB-X devreseR
2tiB-X devreseR
1tiB-X devreseR
0tiB-X dev
reseR
Byte 4: Reserved
(1= enable, 0 = disable)
Byte 2: Reserved
(1= enable, 0 = disable)
TIB#NIPDWPNOITPIRCSED
7tiB-X devreseR
6tiB-X devreseR
5tiB-X devreseR
4tiB-X devreseR
3tiB-X devreseR
2tiB-X devreseR
1tiB-X devreseR
0tiB-X dev
reseR
TIB#NIPDWPNOITPIRCSED
7tiB-0 )etoN(devreseR
6tiB-0 )etoN(devreseR
5tiB-0 )etoN(devreseR
4tiB-0 )etoN(devreseR
3tiB-0 )etoN(devres
eR
2tiB-1 )etoN(devreseR
1tiB-1 )etoN(devreseR
0tiB-0 )etoN(devreseR
Byte 5: Reserved
(1= enable, 0 = disable)
Note: Don’t write into this register, writing into this
register can cause malfunction
TIB#NIPDWPNOITPIRCSED
7tiB1,21 0CKLC,0TKLC
6tiB5,41 1CKLC,1TKLC
5tiB-1 devreseR
4tiB-1 devreseR
3tiB41,311 2CKLC,2TKLC
2tiB72,621 5CKL
C,5TKLC
1tiB-1 devreseR
0tiB52,421 4CKLC,4TKLC
P1-P3P4-P6P7-P9P10-P12P13-P13

93716BFLF

Mfr. #:
Buy 93716BFLF
Manufacturer:
IDT
Description:
Clock Drivers & Distribution Buffer
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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