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93716AFLF

P1-P3P4-P6P7-P9P10-P12P13-P13
7
ICS93716
0420H—09/10/08
GND
ICS93716
V
DD
V
DD
/2
V
(CLKC)
V
(CLKC)
SCOPE
C=15pF
-VDD/2
-VDD/2
-VDD/2
VDD/2
Z=60Ω
Z=60Ω
Z=50Ω
Z=50Ω
R=10Ω
R=10Ω
R=50Ω
R=60Ω
R=60Ω
R=50Ω
V
(TT)
V
(TT)
C=15pF
NOTE: V
(TT)
= GND
t
c(n)
t
c(n+1)
t
jit(cc)
=t
c(n)
±t
c(n+1)
Figure 1. IBIS Model Output Load
Figure 2. Output Load Test Circuit
Y , FB_OUTC
X
Y , FB_OUTT
X
Parameter Measurement Information
ICS93716
Fi
g
ure 3. C
y
cle-to-C
y
cle Jitter
8
ICS93716
0420H—09/10/08
(N is a large number of samples)
t
( ) n+1
t
()n
t
()
=
1
n=
N
t
()n
N
CLK_INC
CLK_INT
FB_INC
FB_INT
t
(skew)
Y
#
X
Y , FB_OUTC
X
Y , FB_OUTT
X
Y , FB_OUTC
X
Y , FB_OUTT
X
Y , FB_OUTC
X
Y , FB_OUTT
X
Y
X
Parameter Measurement Information
Figure 4. Static Phase Offset
Figure 5. Output
Skew
1
f
O
t
=
t
-
(jit_per)
t
c(n)
C(n)
1
f
O
Figure 6. Period Jitter
9
ICS93716
0420H—09/10/08
Clock Inputs
and Outputs
80%
20%
80%
20%
t
slr
t
slf
V
ID
,V
OD
Figure 8. Input and Output Slew Rates
Parameter Measurement
Information
t
jit(hper_n)
t
jit(hper_n+1)
1
f
o
Y , FB_OUTC
X
Y , FB_OUTT
X
Figure 7. Half-Period Jitter
t
jit(hper)
t
jit(hper_n)
1
2xf
O
=-
P1-P3P4-P6P7-P9P10-P12P13-P13

93716AFLF

Mfr. #:
Buy 93716AFLF
Manufacturer:
Description:
IC CLK BUF DDR 233MHZ 1CIRC
Lifecycle:
New from this manufacturer.
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