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74ALVCH162601DGGS

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
1999 Oct 14 12
Philips Semiconductors Product specification
18-bit universal bus transceiver with 30 Ω
termination resistor; 3-state
74ALVCH162601
AC WAVEFORMS
Fig.6 The input A
n
, B
n
to output B
n
, A
n
propagation delay times.
handbook, halfpage
MNA292
A
n
, B
n
input
B
n
, A
n
output
t
PHL
t
PLH
GND
V
I
V
M
V
M
V
OH
V
OL
Notes: V
CC
= 2.3 to 2.7 V
V
M
= 0.5V
CC
;
V
X
=V
OL
+ 150 mV;
V
Y
=V
OH
− 150 mV;
V
I
=V
CC
;
V
OL
and V
OH
are typical output voltage drop that occur with the output load.
Notes: V
CC
= 3.0 to 3.6 V and V
CC
= 2.7 V
V
M
= 1.5 V;
V
X
=V
OL
+ 300 mV;
V
Y
=V
OH
− 300 mV;
V
I
= 2.7 V;
V
OL
and V
OH
are typical output voltage drop that occur with the output load.
1999 Oct 14 13
Philips Semiconductors Product specification
18-bit universal bus transceiver with 30 Ω
termination resistor; 3-state
74ALVCH162601
handbook, full pagewidth
MNA293
LE
XX
, CP
XX
input
B
n
, A
n
output
t
PHL
t
PLH
t
W
1/f
max
V
M
V
OH
V
I
GND
V
OL
V
M
V
M
Fig.7 Latch enable input LE
AB
, LE
BA
and clock input CP
AB
, CP
BA
to output B
n
,A
n
propagation delay times;
pulse width and f
max
of CP
AB
, CP
BA
.
handbook, full pagewidth
MNA294
t
PLZ
t
PHZ
outputs
disabled
outputs
enabled
V
Y
V
X
outputs
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
OE
XX
input
V
I
V
OL
V
OH
V
CC
V
M
GND
GND
t
PZL
t
PZH
V
M
V
M
Fig.8 3-state enable and disable times.
1999 Oct 14 14
Philips Semiconductors Product specification
18-bit universal bus transceiver with 30 Ω
termination resistor; 3-state
74ALVCH162601
Fig.9 Data set-up and hold times for A
n
and B
n
inputs to LE
AB
, LE
BA
, CP
AB
or CP
BA
inputs.
The shaded areas indicate when the input is permitted to change for predictable output performance.
handbook, full pagewidth
MNA295
GND
V
I
GND
V
I
CP
XX,
LE
XX
input
A
n,
B
n
input
t
h
t
su
t
h
t
su
V
M
V
M
Fig.10 Load circuitry for switching times.
V
CC
V
I
<2.7 V V
CC
2.7 to 3.6 V 2.7 V
TEST S1
t
PLH
/t
PHL
open
t
PLZ
/t
PZL
2 × V
CC
t
PHZ
/t
PZH
GND
handbook, full pagewidth
open
GND
50 pF
2 × V
CC
V
CC
V
I
V
O
MNA296
D.U.T.
C
L
R
T
R
L
500 Ω
R
L
500 Ω
PULSE
GENERATOR
S1
Definitions for test circuit.
C
L
= load capacitance including jig and probe capacitance
(See Chapter “AC characteristics”).
R
L
= load resistance.
R
T
= termination resistance should be equal to the output impedance Z
o
of the pulse generator.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

74ALVCH162601DGGS

Mfr. #:
Buy 74ALVCH162601DGGS
Manufacturer:
Nexperia
Description:
Bus Transceivers 18-Bit Universal Bus Transceive
Lifecycle:
New from this manufacturer.
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