9
Notes:
1. If V
IN-
(pin 3) is brought above V
DD1
- 2 V with respect to GND1 an
internal optical-coupling test mode may be activated. This test
mode is not intended for customer use.
2. Avago Technologies recommends the use of non-chlorinated sol-
der uxes.
3. Because of the switched-capacitor nature of the isolated modula-
tor, time averaged values are shown.
4. CMRR
IN
is dened as the ratio of the gain for dierential inputs ap-
plied between V
IN+
and V
IN-
to the gain for common-mode inputs
applied to both V
IN+
and V
IN-
with respect to input ground GND1.
5. Short-circuit current is the amount of output current generated
when either output is shorted to V
DD2
or GND2. Use under these
conditions is not recommended.
6. Data hold time is amount of time that the data output MDAT will
stay stable following the rising edge of output clock MCLK.
7. Resolution is dened as the total number of output bits. The use-
able accuracy of any A/D converter is a function of its linearity and
signal-to-noise ratio, rather than how many total bits it has.
8. Integral nonlinearity is defined as one-half the peak-to-peak
deviation of the best-t line through the transfer curve for V
IN+
=
-200 mV to +200 mV, expressed either as the number of LSBs or as
a percent of measured input range (400 mV).
9. Dierential nonlinearity is dened as the deviation of the actual
dierence from the ideal dierence between midpoints of succes-
sive output codes, expressed in LSBs.
10. Data sheet value is the average magnitude of the dierence in o-
set voltage from T
A
=25°C to T
A
= 85°C, expressed in microvolts per
°C. Three standard deviation from typical value is less than 6µV/°C.
11. Beyond the full-scale input range the output is either all zeroes or
all ones.
12. The eective number of bits (or eective resolution) is dened by
the equation ENOB = (SNR-1.76)/6.02 and represents the resolu-
tion of an ideal, quantization-noise limited A/D converter with the
same SNR.
13. Conversion time is dened as the time from when the convert
start signal CS is brought low to when SDAT goes high, indicating
that output data is ready to be clocked out. This can be as small
as a few cycles of the isolated modulator clock and is determined
by the frequency of the isolated modulator clock and the selected
Conversion and Pre-Trigger modes. For determining the true
signal delay characteristics of the A/D converter for closed-loop
phase margin calculations, the signal delay specication should
be used.
14. Signal delay is dened as the eective delay of the input signal
through the Isolated A/D converter. It can be measured by ap-
plying a -200 mV to ± 200 mV step at the input of modulator and
adjusting the relative delay of the convert start signal CS so that
the output of the converter is at mid scale. The signal delay is the
elapsed time from when the step signal is applied at the input
to when output data is ready at the end of the conversion cycle.
The signal delay is the most important specication for determin-
ing the true signal delay characteristics of the A/D converter and
should be used for determining phase margins in closed-loop
applications. The signal delay is determined by the frequency of
the modulator clock and which Conversion Mode is selected, and
is independent of the selected Pre-Trigger Mode and, therefore,
conversion time.
15. The minimum and maximum overrange detection time is deter-
mined by the frequency of the channel 1 isolated modulator clock.
16. The minimum and maximum threshold detection time is deter-
mined by the user-dened conguration of the adjustable thresh-
old detection circuit and the frequency of the channel 1 isolated
modulator clock. See the Applications Information section for fur-
ther detail. The specied times apply for the default conguration.
17. The signal bandwidth is the frequency at which the magnitude
of the output signal has decreased 3 dB below its low-frequency
value. The signal bandwidth is determined by the frequency of the
modulator clock and the selected Conversion Mode.
18. The isolation transient immunity (also known as Common-Mode
Rejection) species the minimum rate-of-rise of an isolation-mode
signal applied across the isolation boundary beyond which the
modulator clock or data signals are corrupted.
19. In accordance with UL1577, for devices with minimum V
ISO
speci-
ed at 3750 V
rms
, each isolated modulator (optocoupler) is proof-
tested by applying an insulation test voltage greater than 4500
V
rms
for one second (leakage current detection limit I
I-O
< 5µA).
This test is performed before the Method b, 100% production test
for partial discharge shown in IEC/EN/DIN EN 60747-5-2 Insulation
Characteristics Table.
20. This is a two-terminal measurement: pins 1-4 are shorted together
and pins 5-8 are shorted together.
