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AD5332/AD5333/AD5342/AD5343
16
SUGGESTED DATABUS FORMATS
In most applications GAIN and BUF are hard-wired. However,
if more flexibility is required, they can be included in a databus.
This enables you to software program GAIN, giving the option
of doubling the resolution in the lower half of the DAC range.
In a bused system GAIN and BUF may be treated as data inputs
since they are written to the device during a write operation and
take effect when LDAC is taken low. This means that the refer-
ence buffers and the output amplifier gain of multiple DAC
devices can be controlled using common GAIN and BUF lines.
The AD5333 and AD5342 databuses must be at least 10, and
12 bits wide respectively, and are best suited to a 16-bit data-
bus system.
Examples of data formats for putting GAIN and BUF on a 16-
bit databus are shown in Figure 32. Note that any unused bits
above the actual DAC data may be used for BUF and GAIN.
DB0
DB1DB2
DB3
DB4
DB5
DB6
DB7
DB8DB9
GAIN
X
X
AD5342
X = UNUSED BIT
BUF
DB0
DB1DB2DB3
DB4
DB5
DB6
DB7
DB8DB9
GAIN
XX
AD5333
X
X BUF
DB10DB11
Figure 32. GAIN and BUF Data on a 16-Bit Bus
APPLICATIONS INFORMATION
Typical Application Circuits
The AD5332/AD5333/AD5342/AD5343 can be used with a
wide range of reference voltages, especially if the reference inputs
are configured to be unbuffered, in which case the devices offer
full, one-quadrant multiplying capability over a reference range
of 0.25 V to V
DD
. More typically, these devices may be used with a
fixed, precision reference voltage. Figure 33 shows a typical
setup for the devices when using an external reference connected to
the unbuffered reference inputs. If the reference inputs are unbuf-
fered, the reference input range is from 0.25 V to V
DD
, but if the
on-chip reference buffers are used, the reference range is reduced.
Suitable references for 5 V operation are the AD780 and REF192.
For 2.5 V operation, a suitable external reference would be the
AD589, a 1.23 V bandgap reference.
AD5332/AD5333/
AD5342/AD5343
V
OUT
*
0.1F
V
DD
= 2.5V TO 5.5V
V
DD
GND
AD780/REF192
WITH V
DD
= 5V
OR
AD589 WITH V
DD
= 2.5V
V
REF
*
GND
V
OUT
V
IN
EXT
REF
*ONLY ONE CHANNEL OF V
REF
AND V
OUT
SHOWN
10F
Figure 33. AD5332/AD5333/AD5342/AD5343 Using
External Reference
Driving V
DD
from the Reference Voltage
If an output range of zero to V
DD
is required when the reference
inputs are configured as unbuffered, the simplest solution is to
connect the reference inputs to V
DD
. As this supply may not be
very accurate, and may be noisy, the devices may be powered
from the reference voltage, for example using a 5 V reference
such as the ADM663 or ADM666, as shown in Figure 34.
AD5332/AD5333/
AD5342/AD5343
V
OUT
*
V
DD
GND
V
REF
*
GND
V
OUT(2)
V
IN
ADM663/ADM666
VSET SHDN
SENSE
6V TO 16V
*ONLY ONE CHANNEL OF V
REF
AND V
OUT
SHOWN
0.1F
10F
0.1F
Figure 34. Using an ADM663/ADM666 as Power and Refer-
ence to AD5332/AD5333/AD5342/AD5343
Bipolar Operation Using the AD5332/AD5333/AD5342/AD5343
The AD5332/AD5333/AD5342/AD5343 have been designed
for single supply operation, but bipolar operation is achievable
using the circuit shown in Figure 35. The circuit shown has been
configured to achieve an output voltage range of –5 V < V
O
<
+5 V. Rail-to-rail operation at the amplifier output is achievable
using an AD820 or OP295 as the output amplifier.
The output voltage for any input code can be calculated as
follows:
V
O
= [(1 + R4/R3) × (R2/(R1 + R2) × (2 × V
REF
× D/2
N
)] – R4 × V
REF
/R3
where:
D is the decimal equivalent of the code loaded to the DAC, N is
DAC resolution and V
REF
is the reference voltage input.
With:
V
REF
= 2.5 V
R1 = R3 = 10 k
R2 = R4 = 20 k and V
DD
= 5 V.
V
OUT
= (10 × D/2
N
) – 5
AD5332/AD5333/
AD5342/AD5343
GND
V
DD
= 5V
EXT
REF
V
OUT
*
AD780/REF192
WITH V
DD
= 5V
OR
AD589 WITH V
DD
= 2.5V
GND
V
IN
V
OUT
V
REF
*
V
DD
R3
10k
R1
10k
R2
20k
R4
20k
5V
+5V
5V
*ONLY ONE CHANNEL OF V
REF
AND V
OUT
SHOWN
0.1F
0.1F
10F
Figure 35. Bipolar Operation using the AD5332/AD5333/
AD5342/AD5343
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AD5332/AD5333/AD5342/AD5343
17
Decoding Multiple AD5332/AD5333/AD5342/AD5343
The CS pin on these devices can be used in applications to decode
a number of DACs. In this application, all DACs in the system
receive the same data and WR pulses, but only the CS to one of
the DACs will be active at any one time, so data will only be
written to the DAC whose CS is low. If multiple AD5343s are
being used, a common HBEN line will also be required to
determine if the data is written to the high-byte or low-byte
register of the selected DAC.
The 74HC139 is used as a 2- to 4-line decoder to address any
of the DACs in the system. To prevent timing errors from
occurring, the enable input should be brought to its inactive
state while the coded address inputs are changing state. Figure 36
shows a diagram of a typical setup for decoding multiple devices
in a system. Once data has been written sequentially to all DACs in
a system, all the DACs can be updated simultaneously using a
common LDAC line. A common CLR line can also be used to
reset all DAC outputs to zero.
ENABLE
CODED
ADDRESS
1G
1A
1B
V
DD
V
CC
74HC139
DGND
1Y0
1Y1
1Y2
1Y3
A1
HBEN
WR
LDAC
CLR
DATA
INPUTS
DATA
INPUTS
DATA
INPUTS
DATA
INPUTS
DATA BUS
*AD5343 ONLY
A0
HBEN*
WR
LDAC
CLR
CS
AD5332/AD5333/
AD5342/AD5343
AD5332/AD5333/
AD5342/AD5343
AD5332/AD5333/
AD5342/AD5343
AD5332/AD5333/
AD5342/AD5343
A0
HBEN*
WR
LDAC
CLR
CS
A0
HBEN*
WR
LDAC
CLR
CS
A0
HBEN*
WR
LDAC
CLR
CS
Figure 36. Decoding Multiple DAC Devices
AD5332/AD5333/AD5342/AD5343 as a Digitally Program-
mable Window Detector
A digitally programmable upper/lower limit detector using the
two DACs in the AD5332/AD5333/AD5342 is shown in Figure
37. The upper and lower limits for the test are loaded to DACs
A and B which, in turn, set the limits on the CMP04. If a signal
at the V
IN
input is not within the programmed window, an LED
will indicate the fail condition.
Note that the AD5343 has only a single reference input. If using
the AD5332, AD5333, or AD5342, both reference inputs must
be connected.
5V
0.1F
10F
AD5332/AD5333/
AD5342
GND
V
DD
V
OUT
V
REF
B*
*NOT AD5343
V
OUT
B
V
IN
FAIL PASS
1k 1k
PASS/
FAIL
1/6 74HC05
1/2
CMP04
V
REF
A*V
REF
Figure 37. Programmable Window Detector
Programmable Current Source
Figure 38 shows the AD5332/AD5333/AD5342/AD5343 used
as the control element of a programmable current source. In this
example, the full-scale current is set to 1 mA. The output volt-
age from the DAC is applied across the current setting resistor
of 4.7 k in series with the 470 adjustment potentiometer,
which gives an adjustment of about ± 5%. Suitable transistors to
place in the feedback loop of the amplifier include the BC107
and the 2N3904, which enable the current source to operate
from a minimum V
SOURCE
of 6 V. The operating range is deter-
mined by the operating characteristics of the transistor. Suitable
amplifiers include the AD820 and the OP295, both having rail-
to-rail operation on their outputs. The current for any digital
input code and resistor value can be calculated as follows:
IGV
D
R
mA
REF
N
×
×()2
Where:
G is the gain of the buffer amplifier (1 or 2)
D is the digital equivalent of the digital input code
N is the DAC resolution (8, 10, or 12 bits)
R is the sum of the resistor plus adjustment potentiometer in k
AD5332/AD5333/
AD5342/AD5343
GND
V
DD
= 5V
EXT
REF
V
OUT
*
AD780/REF192
WITH V
DD
= 5V
GND
V
IN
V
OUT
V
REF
*
V
DD
4.7k
5V
*ONLY ONE CHANNEL OF V
REF
AND V
OUT
SHOWN
0.1F
0.1F
10F
470
LOAD
V
SOURCE
Figure 38. Programmable Current Source
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AD5332/AD5333/AD5342/AD5343
18
Coarse and Fine Adjustment Using the AD5332/AD5333/
AD5342/AD5343
The DACs in the AD5332/AD5333/AD5342/AD5343 can be
paired together to form a coarse and fine adjustment function,
as shown in Figure 39. DAC A is used to provide the coarse
adjustment while DAC B provides the fine adjustment. Varying
the ratio of R1 and R2 will change the relative effect of the coarse
and fine adjustments. With the resistor values shown the output
amplifier has unity gain for the DAC A output, so the output
range is 0 V to 2.5 V – 1 LSB. For DAC B the amplifier has a gain
of 7.6 × 10
–3
, giving DAC B a range equal to 2 LSBs of DAC A.
The circuit is shown with a 2.5 V reference, but reference volt-
ages up to V
DD
may be used. The op amps indicated will allow a
rail-to-rail output swing.
Note that the AD5343 has only a single reference input. If using
the AD5332, AD5333, or AD5342, both reference inputs must
be connected.
GND
V
DD
= 5V
EXT
REF
AD780/REF192
WITH V
DD
= 5V
V
IN
V
OUT
R2
51.2k
V
OUT
+5V
0.1F
0.1F10F
AD5332/AD5333/
AD5342/AD5343
GND
V
REF
A*
V
DD
V
OUT
A
R1
390
V
REF
B*
*NOT AD5343
V
OUT
B
R4
390
R3
51.2k
Figure 39. Coarse and Fine Adjustment
Power Supply Bypassing and Grounding
In any circuit where accuracy is important, careful consideration
of the power supply and ground return layout helps to ensure
the rated performance. The printed circuit board on which the
AD5332/AD5333/AD5342/AD5343 is mounted should be
designed so that the analog and digital sections are separated,
and confined to certain areas of the board. If the device is in a
system where multiple devices require an AGND-to-DGND
connection, the connection should be made at one point only.
The star ground point should be established as closely as pos-
sible to the device. The AD5332/AD5333/AD5342/AD5343
should have ample supply bypassing of 10 µF in parallel with
0.1 µF on the supply located as close to the package as pos-
sible, ideally right up against the device. The 10 µF capacitors
are the tantalum bead type. The 0.1 µF capacitor should have
low Effective Series Resistance (ESR) and Effective Series Induc-
tance (ESI), like the common ceramic types that provide a low
impedance path to ground at high frequencies to handle tran-
sient currents due to internal logic switching.
The power supply lines of the device should use as large a trace
as possible to provide low impedance paths and reduce the effects
of glitches on the power supply line. Fast switching signals such
as clocks should be shielded with digital ground to avoid radiat-
ing noise to other parts of the board, and should never be run
near the reference inputs. Avoid crossover of digital and ana-
log signals. Traces on opposite sides of the board should run
at right angles to each other. This reduces the effects of feed-
through through the board. A microstrip technique is by far
the best, but not always possible with a double-sided board. In
this technique, the component side of the board is dedicated to
ground plane while signal traces are placed on the solder side.

AD5333BRUZ-REEL7

Mfr. #:
Manufacturer:
Description:
Digital to Analog Converters - DAC IC 10-BIT DUAL
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New from this manufacturer.
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