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CY25811ZXCT

P1-P3P4-P6P7-P9P10-P12P13-P13
CY25811/12/14
Document Number: 38-07112 Rev. *H Page 4 of 13
Input and Output Frequency Selection
The relationship between input frequency and output frequency in device selection and FRSEL setting is given in Ta bl e 5. As shown,
the input frequency range is selected by FRSEL and is the same for CY25811, CY25812, and CY25814. The selection of CY25811
(1x), CY25812 (2x), or CY25814 (4x) determines the frequency multiplication at the output (SSCLK, Pin 5) with respect to input
frequency (XIN, Pin-1).
Table 5. Input and Output Frequency Selection
Input Frequency Range
(MHz)
FRSEL Product Multiplication
Output Frequency Range
(MHz)
4 to 8 0 CY25811 1x 4 to 8
8 to 16 1 CY25811 1x 8 to 16
16 to 32 M CY25811 1x 16 to 32
4 to 8 0 CY25812 2x 8 to 16
8 to 16 1 CY25812 2x 16 to 32
16 to 32 M CY25812 2x 32 to 64
4 to 8 0 CY25814 4x 16 to 32
8 to 16 1 CY25814 4x 32 to 64
16 to 32 M CY25814 4x 64 to 128
[+] Feedback
CY25811/12/14
Document Number: 38-07112 Rev. *H Page 5 of 13
Absolute Maximum Conditions
(Both Commercial and Industrial Grades)
[1,2]
Parameter Description Condition Min Max Unit
V
DD
Supply Voltage –0.5 4.6 V
V
IN
Input Voltage Relative to V
SS
–0.5 V
DD
+ 0.5 VDC
T
S
Temperature, Storage Non Functional –65 150 °C
T
A1
Temperature, Operating Ambient Functional, C-Grade 0 70 °C
T
A2
Temperature, Operating Ambient Functional, I-Grade –40 85 °C
T
J
Temperature, Junction Functional – 150 °C
ESD
HBM
ESD Protection (Human Body Model) MIL-STD-883, Method 3015 2000 – V
UL-94 Flammability Rating at 1/8 in. V–0
MSL Moisture Sensitivity Level 1
DC Electrical Specifications
(Commercial Grade)
Parameter Description Condition Min Max Unit
V
DD
3.3V Operating Voltage 3.3V ± 10% 2.97 3.63 V
V
IL
Input Low Voltage S0, S1 and FRSEL Inputs 0 0.15V
DD
V
V
IM
Input Middle Voltage S0, S1 and FRSEL Inputs 0.40V
DD
0.60V
DD
V
V
IH
Input High Voltage S0, S1 and FRSEL Inputs 0.85V
DD
V
DD
V
V
OL1
Output Low Voltage I
OL
= 4 ma, SSCLK Output – 0.4 V
V
OL2
Output Low Voltage I
OL
= 10 ma, SSCLK Output – 1.2 V
V
OH1
Output High Voltage I
OH
= 4 ma, SSCLK Output 2.4 – V
V
OH2
Output High Voltage I
OH
= 6 ma, SSCLK Output 2.0 – V
C
IN1
Input Pin Capacitance XIN (Pin 1) and XOUT (Pin 8) 3.5 9.0 pF
C
IN2
Input Pin Capacitance All Digital Inputs 2.8 6.0 pF
C
L
Output Load Capacitor SSCLK Output – 15 pF
I
DD1
Dynamic Supply Current Fin = 12 MHz, no load – 28 mA
I
DD2
Dynamic Supply Current Fin = 24 MHz, no load – 33 mA
I
DD3
Dynamic Supply Current Fin = 32 MHz, no load – 40 mA
Notes
1. Operation at any Absolute Maximum Rating is not implied.
2. Single Power Supply: The voltage on any input or I/O pin cannot exceed the power pin during power up.
[+] Feedback
CY25811/12/14
Document Number: 38-07112 Rev. *H Page 6 of 13
AC Electrical Specifications
(Commercial Grade)
Parameter Description Condition Min Max Unit
F
IN
Input Frequency Range Clock, Crystal, or Ceramic Resonator Input 4 32 MHz
T
R1
Clock Rise Time SSCLK, CY25811 and CY25812 2.0 5.0 ns
T
F1
Clock Fall Time SSCLK, CY25811 and CY25812 1.6 4.4 ns
T
R2
Clock Rise Time SSCLK, only CY25814 when FRSEL = M 1.0 2.2 ns
T
F2
Clock Fall Time SSCLK, only CY25814 when FRSEL = M 0.8 2.2 ns
T
DCIN
Input Clock Duty Cycle XIN 40 60 %
T
DCOUT
Output Clock Duty Cycle SSCLK 40 60 %
T
CCJ1
Cycle to Cycle Jitter, Spread on Fin = 4 MHz, Fout = 4 MHz, CY25811 – 800 ps
T
CCJ2
Cycle to Cycle Jitter, Spread on Fin = 8 MHZ, Fout = 8 MHz, CY25811 – 480 ps
T
CCJ3
Cycle to Cycle Jitter, Spread on Fin = 8 MHz, Fout = 16 MHz, CY25812 – 400 ps
T
CCJ4
Cycle to Cycle Jitter, Spread on Fin = 16 MHz, Fout = 32 MHz, CY25812 – 450 ps
T
CCJ5
Cycle to Cycle Jitter, Spread on Fin = 16 MHz, Fout = 64 MHz, CY25814 – 550 ps
T
CCJ6
Cycle to Cycle Jitter, Spread on Fin = 32 MHz, Fout = 128 MHz, CY25814 – 380 ps
T
SU
PLL Lock Time From V
DD
= 3.0V to valid SSCLK – 3 ms
DC Electrical Specifications
(Industrial Grade)
Parameter Description Condition Min Max Unit
V
DD
3.3V Operating Voltage 3.3V ± 5% 3.135 3.465 V
V
IL
Input Low Voltage S0, S1 and FRSEL Inputs 0 0.13V
DD
V
V
IM
Input Middle Voltage S0, S1 and FRSEL Inputs 0.40V
DD
0.60V
DD
V
V
IH
Input High Voltage S0, S1 and FRSEL Inputs 0.85V
DD
V
DD
V
V
OL1
Output Low Voltage I
OL
= 4 ma, SSCLK Output – 0.4 V
V
OL2
Output Low Voltage I
OL
= 10 ma, SSCLK Output – 1.2 V
V
OH1
Output High Voltage I
OH
= 4 ma, SSCLK Output 2.4 – V
V
OH2
Output High Voltage I
OH
= 6 ma, SSCLK Output 2.0 – V
C
IN1
Input Pin Capacitance XIN (Pin 1) and XOUT (Pin 8) 3.5 9.0 pF
C
IN2
Input Pin Capacitance All Digital Inputs 2.8 6.0 pF
C
L
Output Load Capacitor SSCLK Output – 15 pF
I
DD1
Dynamic Supply Current Fin = 12 MHz, no load – 28 mA
I
DD2
Dynamic Supply Current Fin = 24 MHz, no load – 33 mA
I
DD3
Dynamic Supply Current Fin = 32 MHz, no load – 41 mA
AC Electrical Specifications
(Industrial Grade)
Parameter Description Condition Min Max Unit
F
IN
Input Frequency Range Clock, Crystal or Ceramic Resonator Input 4 32 MHz
T
R1
Clock Rise Time SSCLK, CY25811, and CY25812 2.0 5.0 ns
T
F1
Clock Fall Time SSCLK, CY25811, and CY25812 1.6 4.4 ns
T
R2
Clock Rise Time SSCLK, only CY25814 when FRSEL = M 1.0 2.2 ns
T
F2
Clock Fall Time SSCLK, only CY25814 when FRSEL = M 0.8 2.2 ns
T
DCIN
Input Clock Duty Cycle XIN 40 60 %
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P1-P3P4-P6P7-P9P10-P12P13-P13

CY25811ZXCT

Mfr. #:
Buy CY25811ZXCT
Manufacturer:
Cypress Semiconductor
Description:
Phase Locked Loops - PLL Advncd PREMIS Spread Spctrum Clk Synthszr
Lifecycle:
New from this manufacturer.
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