AT28C16-15JC Datasheet AT28C16E-15SI, AT28C16-15PI, AT28C16E-15JI | P1-P3

Features

•

Fast Read Access Time - 150 ns

•

Fast Byte Write - 200

µs or 1 ms

•

Self-Timed Byte Write Cycle

– Internal Address and Data Latches

– Internal Control Timer

– Automatic Clear Before Write

•

Direct Microprocessor Control

–DATA POLLING

•

Low Power

– 30 mA Active Current

–100

µA CMOS Standby Current

•

High Reliability

– Endurance: 10

or 10

Cycles

– Data Retention: 10 Years

•

10% Supply

•

CMOS & TTL Compatible Inputs and Outputs

•

JEDEC Approved Byte Wide Pinout

•

Commercial and Industrial Temperature Ranges

Description

The AT28C16 is a low-power, high-performance Electrically Erasable and Program-

mable Read Only Memory with easy to use features. The AT28C16 is a 16K memory

organized as 2,048 words by 8 bits. The device is manufactured with Atmel’s reliable

nonvolatile CMOS technology.

16K (2K x 8)

Parallel

EEPROMs

AT28C16

Rev. 0540B–10/98

Pin Configurations

Pin Name Function

A0 - A10 Addresses

Chip Enable

OE Output Enable

Write Enable

I/O0 - I/O7 Data Inputs/Outputs

NC No Connect

DC Don’t Connect

PDIP, SOIC

Top View

I/O0

I/O1

I/O2

GND

VCC

A10

I/O7

I/O6

I/O5

I/O4

I/O3

PLCC

Top View

Note: PLCC package pins 1 and 17

are DON’T CONNECT.

I/O0

A10

I/O7

I/O6

I/O1

I/O2

GND

I/O3

I/O4

I/O5

VCC

(continued)

AT28C16

The AT28C16 is accessed like a static RAM for the read or

write cycles without the need of external components. Dur-

ing a byte write, the address and data are latched inter-

nally, freeing the microprocessor address and data bus for

other operations. Following the initiation of a write cycle,

the device will go to a busy state and automatically clear

and write the latched data using an internal control timer.

The end of a write cycle can be determined by DATA

POLLING of I/O

Once the end of a write cycle has been

detected, a new access for a read or a write can begin.

The CMOS technology offers fast access times of 150 ns at

low power dissipation. When the chip is deselected the

standby current is less than 100 µA.

Atmel’s 28C16 has additional features to ensure high qual-

ity and manufacturability. The device utilizes error correc-

tion internally for extended endurance and for improved

data retention characteristics. An extra 32 bytes of

EEPROM are available for device identification or tracking.

Block Diagram

Absolute Maximum Ratings*

Temperature Under Bias................................ -55°C to +125°C

*NOTICE: Stresses beyond those listed under “Absolute

Maximum Ratings” may cause permanent dam-

age to the device. This is a stress rating only and

functional operation of the device at these or any

other conditions beyond those indicated in the

operational sections of this specification is not

implied. Exposure to absolute maximum rating

conditions for extended periods may affect

device reliability

Storage Temperature..................................... -65°C to +150°C

All Input Voltages (including NC Pins)

with Respect to Ground...................................-0.6V to +6.25V

All Output Voltages

with Respect to Ground.............................-0.6V to V

+ 0.6V

Voltage on OE

and A9

with Respect to Ground...................................-0.6V to +13.5V

AT28C16

Device Operation

READ:

The AT28C16 is accessed like a Static RAM.

When CE

and OE are low and WE is high, the data stored

at the memory location determined by the address pins is

asserted on the outputs. The outputs are put in a high

impedance state whenever CE

or OE is high. This dual line

control gives designers increased flexibility in preventing

bus contention.

BYTE WRITE:

Writing data into the AT28C16 is similar to

writing into a Static RAM. A low pulse on the WE

or CE

input with OE high and CE or WE low (respectively) ini-

tiates a byte write. The address location is latched on the

last falling edge of WE

(or CE); the new data is latched on

the first rising edge. Internally, the device performs a self-

clear before write. Once a byte write has been started, it

will automatically time itself to completion. Once a pro-

gramming operation has been initiated and for the duration

of t

, a read operation will effectively be a polling opera-

tion.

FAST BYTE WRITE:

The AT28C16E offers a byte write

time of 200 µs maximum. This feature allows the entire

device to be rewritten in 0.4 seconds.

DATA

POLLING:

The AT28C16 provides DATA

POLLING

to signal the completion of a write cycle. During a write

cycle, an attempted read of the data being written results in

the complement of that data for I/O

(the other outputs are

indeterminate). When the write cycle is finished, true data

appears on all outputs.

WRITE PROTECTION:

Inadvertent writes to the device

are protected against in the following ways: (a) V

sense—if V

is below 3.8V (typical) the write function is

inhibited; (b) V

power on delay—once V

has reached

3.8V the device will automatically time out 5 ms (typical)

before allowing a byte write; and (c) write inhibit—holding

any one of OE

low, CE high or WE high inhibits byte write

cycles.

CHIP CLEAR

: The contents of the entire memory of the

AT28C16 may be set to the high state by the CHIP CLEAR

operation. By setting CE

low and OE to 12 volts, the chip is

cleared when a 10 msec low pulse is applied to WE

DEVICE IDENTIFICATION:

An extra 32 bytes of

EEPROM memory are available to the user for device iden-

tification. By raising A9 to 12 ± 0.5V and using address

locations 7E0H to 7FFH the additional bytes may be written

to or read from in the same manner as the regular memory

array.

P1-P3 P4-P6 P7-P9 P10-P12

AT28C16-15JC

Mfr. #:

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IC EEPROM 16K PARALLEL 32PLCC

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AT28C16-15JC

AT28C16-15JC

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