TC62D748AFG/AFNAG/BFNAG
Absolute Maximum Ratings (T
a
25°C)
Characteristics
Symbol Rating *1 Unit
P o w e r s u p p l y v o l t a g e
V
DD
0.3 to 6.0
V
O u t p u t c u r r e n t
I
OUT
95 mA
L o g i c i n p u t v o l t a g e
V
IN
0.3 to V
DD
0.3 *2
V
O u t p u t v o l t a g e
V
OUT
0.3 to 17
V
O p e r a t i n g t e m p e r a t u r e T
opr
40 to 85
°C
S t o r a g e t e m p e r a t u r e
T
stg
55 to 150
°C
T h e r m a l r e s i s t a n c e
Rth(j-a)
94 (AFG) *3, 80.07(AFNAG/BFNAG)
When mounted PCB
°C/W
P o w e r d i s s i p a t i o n
P
D
*4
1.32 (AFG) *3, 1.56(AFNAG/BFNAG)
When mounted PCB
W
Note1: Voltage is ground referenced.
Note2: Do not exceed 6.0V.
Note3: PCB condition 76.2 x 114.3 x 1.6 mm, Cu 30% (SEMI conforming)
Note4: The power dissipation decreases the reciprocal of the saturated thermal resistance (1/ Rth(j-a)) for each
degree (1°C) that the ambient temperature is exceeded (Ta = 25°C).
Operating
Conditions
DC Items (Unless otherwise specified, V
DD
3.0 to 5.5 V, T
a
40°C to 85°C)
Characteristics
Symbol Test Conditions Min
Typ.
Max Unit
P o w e r s u p p l y v o l t a g e
V
DD
3.0
5.5 V
High le vel lo gic input volt age
V
IH
SIN,SCK, SLAT , OE
0.7
V
DD
V
DD
V
Low le ve l lo gi c inp u t vo l t age
V
IL
SIN,SCK, SLAT , OE GND
0.3
V
DD
V
H i g h l e v e l S O U T o u t p u t c u r r e n t I
OH
1
mA
Low level SO UT output cur r ent
I
OL
1 mA
Const a nt curre nt ou tput
I
OUT
OUTn
1.5
90 mA
AC Items (Unless otherwise specified, V
DD
3.0 to 5.5 V, T
a
40°C to 85°C)
Characteristics
Symbol
Tes t
Circuits
Test Conditions Min
Typ.
Max Unit
Serial dat a tr ansfer freque ncy f
SCK
6
25 MHz
H o l d t i m e
t
HOLD1
6
5
ns
t
HOLD2
6
5
ns
S e t u p t i m e
t
SETUP1
6
5
ns
t
SETUP2
6
5
ns
M a x i m u m c l o c k r i s e t i m e
t
r
6 *1
500 ns
M a x i m u m c l o c k f a l l t i m e
t
f
6 *1
500 ns
Note1: If the device is connected in a cascade and the tr/tf of the clock waveform increases due to deceleration of the clock
waveform,it may not be possible to achieve the timing required for data transfer. Please keep these timing conditions in mind
when designing your application.
6 2010-03-05
