HIGH RIPPLE-REJECTION AND LOW DROPOUT CMOS VOLTAGE REGULATOR
S-L2980 Series
Rev.5.1_00
Seiko Instruments Inc.
12
3. ON/OFF Pin
This pin starts and stops the regulator.
When the ON/OFF pin is set to OFF level, the operation of all internal circuits stops, the built-in P-
channel MOS FET output transistor between VIN pin and VOUT pin is turned off to make current
consumption drastically reduced. The VOUT pin becomes the V
SS
level due to internally divided
resistance of several hundreds kΩ between the VOUT pin and VSS pin.
Furthermore, the structure of the ON/OFF pin is as shown in Figure 12. Since the ON/OFF pin is
neither pulled down nor pulled up internally, do not use it in the floating state. In addition, please note
that current consumption increases if a voltage of 0.3 V to VIN–0.3 V is applied to the ON/OFF pin.
When the ON/OFF pin is not used, connect it to the VIN pin in case the product type is “A” and to the
VSS pin in case of “B”.
Table 5
Product Type ON/OFF Pin Internal Circuit VOUT Pin Voltage Current Consumption
A “H”: ON Operate Set value I
SS1
A “L”: OFF Stop V
SS
level I
SS2
B “H”: OFF Stop V
SS
level I
SS2
B “L”: ON Operate Set value I
SS1
VSS
ON/OFF
VIN
Figure 12
Selection of Output Capacitor (C
L
)
The S-L2980 Series needs an output capacitor between VOUT pin and VSS pin for phase compensation.
A ceramic capacitor whose capacitance is 1.0 μF or more
*1
can be used. When an OS (Organic Semi-
conductor) capacitor, a tantalum capacitor or an aluminum electrolyte capacitor is used, the capacitance
should be 2.2 μF or more and the ESR should be 10 Ω or less.
The value of the output overshoot or undershoot transient response varies depending on the value of the
output capacitor.
Sufficient evaluation including temperature dependency in the actual environment is needed.
*1. If the product whose output voltage is 1.7 V or less will be used, the capacitance should be 2.2 μF
or more.
