6.42
IDT70P264/254/244L Datasheet
Low Power 1.8V 16K/8K/4K x 16 Dual-Port Static RAM Industrial Temperature Range
6
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(VDD = 1.8V ± 100mV)
Symbol Parameter
Test Conditions
Min. Max. Unit
I
LI
Input Leakage Current
V
DD
= 1.8V, V
IN
= 0V
to
V
DD
-1 1
µA
I
LO
Output Leakage Current
CE = V
IH
, V
OUT
= 0V
to
V
DD
-1 1
µA
V
OLL
Output Low Voltage (V
DDQL
= 3.0V)
I
OLL
= +2mA
___
0.4 V
V
OHL
Output High Voltage (V
DDQL
= 3.0V)
I
OHL
= -2mA
2.1
___
V
V
OLL
Output Low Voltage (V
DDQL
= 2.5V)
I
OLL
= +2mA
___
0.4 V
V
OHL
Output High Voltage (V
DDQL
= 2.5V)
I
OHL
= -2mA
2.0
___
V
V
OLL
Output Low Voltage (V
DDQL
= 1.8V)
I
OLL
= +0.1mA
___
0.2 V
V
OHL
Output High Voltage (V
DDQL
= 1.8V)
I
OHL
= -0.1mA
V
DDQL
- 0.2V
___
V
V
OLR
Output Low Voltage
I
OLR
= +0.1mA
___
0.2 V
V
OHR
Output High Voltage
I
OHR
= -0.1mA
V
DD
- 0.2V
___
V
V
OLINT
(1,2)
Output Low Voltage Interrupt
I
OL
= +2mA
___
0.4 V
7148 tbl 08
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(VDD = 1.8V ±100mV)
NOTES:
1. V
DD = 1.8V, TA = +25°C, and are not production tested. IDD = 15mA (typ.)
2. At f = f
MAX, address and control lines are cycling at the maximum frequency read cycle of 1/tRC, and using “AC Test Conditions”.
3. Port "A" may be either left or right port. Port "B" is the opposite from port "A".
70P264/254/244
Ind'l Only
Symbol Parameter Test Condition Version
40ns 55ns
Typ.
(1)
Max. Typ.
(1)
Max. Unit
I
DD
Dynamic Operating Current
(Both Ports Active)
CE
R
and CE
L
= V
IL
, Outputs Open
f = f
MAX
(2)
IND'L L 25 40 15 25
mA
I
SB1
Standby Current (Both Ports
Inactive)
CE
R
= V
DD
- 0.2V and CE
L
=
V
DDQL
- 0.2V
,
f = f
MAX
(2)
IND'L L
2
6
2
6
µA
I
SB2
Standby Current (One Port
Inactive, One Port Active)
CE"
A
" = V
IL
and CE"
B
" = V
IH
(3)
, Active Port Outputs Open
f = f
MAX
(2)
IND'L L
8.5 18 8.5 14 mA
I
SB3
Full Standby Current (Both
Ports Inactive - CMOS Level
Inputs)
CE
L
> V
DDQL
- 0.2V and CE
R
> V
DD
- 0.2V,
f = 0
IND'L L
2
626
µA
I
SB4
Standby Current (One Port
Inactive, One Port Active -
CMOS Level Inputs)
CE
"A"
< 0.2V and CE
"B"
> V
DDQ
- 0.2V
(3)
,
Active Port Outputs Open
f = f
MAX
(2)
IND'L L
8.5 18 8.5 14 mA
7148 tbl 09
NOTES:
1. Interrupt can be level shifted to a higher voltage by tieing a resistor (R3) to an external power supply (VDDINT
X). The value of R3 is a trade off between
t
INX and power.
2. VDDINT
R > VDD, VDDINTL > VDDQL