Test Mil AD10242BZ/TZ
Parameter Temp Level Subgroup Min Typ Max Unit
SPURIOUS-FREE DYNAMIC RANGE
9
Analog Input @ 1.2 MHz 25°CI 81 dBFS
@ 4.85 MHz 25°CI 47080 dBFS
Full II 5, 6 70 79 dBFS
@ 9.9 MHz 25°CI 46370 dBFS
Full II 5, 6 63 69 dBFS
@ 19.5 MHz 25°CI 46067 dBFS
Full II 5, 6 60 66 dBFS
TWO-TONE IMD REJECTION
10
F1, F2 @ –7 dBFS Full II 4, 5, 6 70 76 dBc
CHANNEL-TO-CHANNEL ISOLATION
11
25°CIV12 75 80 dB
TRANSIENT RESPONSE 25°CV 10 ns
LINEARITY
Differential Nonlinearity 25°CIV12 0.3 1.0 LSB
(Encode = 20 MHz) Full IV 12 0.5 1.25 LSB
Integral Nonlinearity 25°CV 0.3
LSB
(
Encode
= 20 MHz) Full V 0.5 LSB
OVERVOLTAGE RECOVERY TIME
12
V
IN
= 2.0 × FS Full IV 12 50 100 ns
V
IN
= 4.0 × FS
Full IV 12 75 200 ns
DIGITAL OUTPUTS
Logic Compatibility CMOS
Logic “1” Voltage
13
Full I 1, 2, 3 3.5 4.2 V
Logic “0” Voltage
14
Full I 1, 2, 3 0.45 0.65 V
Output Coding Twos Complement
POWER SUPPLY
AV
CC
Supply Voltage Full VI 5.0 V
I (AV
CC
) Current Full V 260 mA
AV
EE
Supply Voltage Full VI –5.0 V
I (AV
EE
) Current Full V 55 mA
DV
CC
Supply Voltage Full VI 5.0 V
I (DV
CC
) Current Full V 25 mA
I
CC
(Total) Supply Current Full I 1, 2, 3 350 400 mA
Power Dissipation (Total) Full I 1, 2, 3 1.75 2.0 W
Power Supply Rejection Ratio (PSRR) Full I 7, 8 0.01 0.02 % FSR/% V
S
Pass-Band Ripple to 10 MHz Full IV 12 0.2 dB
NOTES
1
Gain tests are performed on A
IN
3 over specified input voltage range.
2
Input capacitance specifications combine AD9632 die capacitance and ceramic package capacitance.
3
Full power bandwidth is the frequency at which the spectral power of the fundamental frequency (as determined by FFT analysis) is reduced by 3 dB.
4
ENCODE driven by single-ended source; ENCODE bypassed to ground through 0.01 µF capacitor.
5
ENCODE may also be driven differentially in conjunction with ENCODE; see Encoding the AD10242 section for details.
6
Minimum and maximum conversion rates allow for variation in Encode Duty Cycle of 50% ± 5%.
7
Analog Input signal power at –1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first five harmonics removed). Encode = 40.0 MSPS.
8
Analog Input signal power at –1 dBFS; signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics. Encode = 40.0 MSPS.
9
Analog Input signal equals –1 dBFS; SFDR is the ratio of converter full scale to worst spur.
10
Both input tones at –7 dBFS; two-tone intermodulation distortion (IMD) rejection is the ratio of either tone to the worst third order intermod product. f1 = 10.0 MHz
± 100 kHz, 50 kHz ≤ f1 – f2 ≤ 300 kHz.
11
Channel-to-channel isolation tested with A channel grounded and a full-scale signal applied to B channel (A
IN
1).
12
Input driven to 2× and 4× A
IN
1 range for >4 clock cycles. Output recovers in band in specified time with Encode = 40 MSPS. No foldover guaranteed.
13
Outputs are sourcing 10 µA.
14
Outputs are sinking 10 µA.
All specifications guaranteed within 100 ms of initial power-up regardless of sequencing.
Specifications subject to change without notice.
AD10242
–3–
