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CTST570QG

P1-P3P4-P6P7-P9P10-P10
North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com/semiconductors
Specifications are subject to change without notice.
4
RevA0215
CT
S
T57
0
Programmable Capacitive Tuning IC
SON8
Programming Modes
The CTST570 has two capacitance setting modes from which bits are set and the matching capacitors are
selected.
Reading directly from the shift register
• This is useful for testing the capacitance and subsequent oscillator frequency. This mode is
active after the last bit is shifted in and when the CLK pin is left logic high. For the shift
register, capacitors are selected when bits are active HIGH.
Reading from the value contained in the EEPROM
• Prevents customer adjustment and retains factory programming and is active when the CLK
pin is at logic low or not connected. For the EEPROM, capacitors are selected when bits are
active LOW.
Programming from the Shift Register
To initially determine the capacitance value for the desired center frequency of the oscillator one should set the
capacitance of the CTST570 directly from the active shift register bits. To accomplish this, the CLK pin is left
high after the last control word bit has been shifted in. Figure 5 shows the control word 11001100100 has been
serially entered into the register. Note that bit-0 is the 1
st
bit to enter and bit-10 is the last. In the CTST570, bit-
0, bit-9 and bit-10 do not affect the capacitance value but still must be included in the serial bit stream. For the
shift register, capacitors are selected when bits are active HIGH.
Figure 4 – Shift Register Programming
Writing Data to the EEPROM
Once the desired capacitance value has been determined, the digital control word can be written or re-written
into the EEPROM. By storing the control word in the EEPROM, the customer is prevented from making
adjustments from the factory set programming data. This is accomplished within the CTST570 with internal
pull-downs on the DA, PV, and CLK pins. The detailed sequence for writing data to the EEPROM within the
CTST570 is described in Table 4. Note that with EEPROM, capacitors are selected when bits are active LOW.
North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com/semiconductors
Specifications are subject to change without notice.
5
RevA0215
CT
S
T57
0
Programmable Capacitive Tuning IC
SON8
Table 3 – Data Writing Sequence for EEPROM
Step Action
1
Determine the desired capacitor control word with the operational power supply voltage and
desired oscillator conditions.
2
Set the V
DD
supply voltage to +5.0V.
3
If EEPROM is not already erased, erase EEPROM (see “Erasing the EEPROM” section).
4
Read the current state of the EEPROM bits (see “Reading Back from the EEPROM” section).
5
Compare the desired control word to the stored EEPROM control word. Count the number of
differences so as to prevent double/redundant writing.
6
One bit at a time, load the first desired control word bit (bit selection for EEPROM is active
LOW).
7
Set the PV pin to +6V (5.6V, 6.1V) with the pulse and idle shown in timing diagram (Figure 7).
8
Progress through all necessary control word bits by repeating steps 5 & 6 until all bits are set to
the desired control word.
9
Verify the correct EEPROM contents by reading back the individual bits.
For an example of writing bits into the EEPROM, suppose the desired capacitance is 3.43pF. The control word
becomes ‘00000010100’ (Figure 5). Also suppose the EEPROM bits have been erased and therefore logic
high (The CTST570 is initially shipped in this condition). Since bit-0 is the first bit to be loaded, the bit
sequence becomes 0-0-1-0-1-0-0-0-0-0-0. However, as described before, selecting bits for the EEPROM are
active LOW, which will invert the logical values in the sequence to 1-1-0-1-0-1-1-1-1-1-1 (Figure 6). Note the
differences between the EEPROM bits and the converted control word. Since there are 2 differences, two write
cycles are required as only 1 bit should be written at a time. Figure 7 shows the timing for bit-2 while Figure 8
shows the timing for bit-4.
Figure 5 – Desired Control Word
Figure 6 – Converted control word and differences from known EEPROM states
North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com/semiconductors
Specifications are subject to change without notice.
6
RevA0215
CT
S
T57
0
Programmable Capacitive Tuning IC
SON8
Figure 7 – First Programming Cycle to Program bit-2 into the EEPROM
Figure 8 – Second Programming Cycle to Program bit-4 into the EEPROM
Reading Back from the EEPROM
During programming, the PV pin is used to program the necessary control bits into the EEPROM. However, it
is also used to read the bits currently programmed into the EEPROM. When the PV pin is not used during
programming, the CTST570 provides a weak pull-up and pull-down on the pin. This allows the EEPROM data
to be shifted out to the PV pin and read after the CLK sequence is complete and when the DA & CLK pins are
high (Figure 12). Each EEPROM bit is selected by setting the DA signal low (EEPROM selection is active low)
during the CLK sequence. With an external 68k resistor pull-up to V
DD
on the PV pin, a low EEPROM bit
produces 0.4*V
DD
level while a high EEPROM bit produces a 0.6*V
DD
level.
P1-P3P4-P6P7-P9P10-P10

CTST570QG

Mfr. #:
Buy CTST570QG
Manufacturer:
CTS Electronic Components
Description:
Tuners Prog. Cap. Tuning IC Range 2.6pF-14.55pF
Lifecycle:
New from this manufacturer.
Delivery:
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