DMOS Dual Full-Bridge PWM Motor Driver
A3974
3
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
FUNCTIONAL BLOCK DIAGRAM
Copyright © 2001 Allegro MicroSystems, Inc.
CHARGE PUMP
BANDGAP
V
DD
C
REG
TSD
UNDER-
VOLTAGE &
FAULT DETECT
CHARGE
PUMP
BANDGAP
REGULATOR
V
DD
V
BB1
+
LOGIC
SUPPLY
V
REG
CP1
CP
CP2
LOAD
SUPPLY
1
GATE DRIVE
SLEEP
MODE
CONTROL LOGIC
PHASE
SYNC RECT MODE
SYNC RECT DISABLE
MODE
PROGRAMMABLE
PWM TIMER
SENSE
1
R
S1
FIXED OFF
BLANK
DECAY
ENABLE
1
OSC
CLOCK
DATA
STROBE
REFERENCE
BUFFER &
DIVIDER
OUT
1A
OUT
1B
REF
1
V
REF
C
S1
PROGRAMMABLE
PWM TIMER
FIXED OFF
BLANK
DECAY
GATE DRIVE
Dwg. FP-048-1
CONTROL LOGIC
PHASE
ENABLE
SYNC RECT MODE
SYNC RECT DISABLE
PWM MODE INT
PWM MODE EXT
SENSE
2
R
S2
ENABLE
2
REFERENCE
BUFFER &
DIVIDER
OUT
2A
OUT
2B
REF
2
V
REF2
C
S2
V
BB2
LOAD
SUPPLY
2
+
SERIAL
PORT
CHARGE
PUMP
TO PWM TIMER
ZERO CURRENT DETECT
CURRENT SENSE
ZERO CURRENT DETECT
CURRENT SENSE
DMOS Dual Full-Bridge PWM Motor Driver
A3974
4
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
ELECTRICAL CHARACTERISTICS at T
A
= +25°C, V
BB
= 50 V, V
DD
= 5.0 V, f
PWM
< 50 kHz (unless
otherwise noted).
Limits
Characteristic Symbol Test Conditions Min. Typ. Max. Units
Output Drivers
Load Supply Voltage Range V
BB
Operating 15 — 50 V
During sleep mode 0 50 V
Output Leakage Current I
DSS
V
OUT
= V
BB
<1.0 20 μA
V
OUT
= 0 V <-1.0 -20 μA
Output ON Resistance r
DS(on)
Source driver, I
OUT
= -1.5 A 0.5 0.55 Ω
Sink driver, I
OUT
= 1.5 A 0.315 0.35 Ω
Body Diode Forward Voltage V
F
Source diode, I
F
= 1.5 A 1.2 V
Sink diode, I
F
= 1.5 A 1.2 V
Load Supply Current I
BB
f
PWM
< 50 kHz 4.0 7.0 mA
Charge pump on, outputs disabled 2.0 5.0 mA
Sleep or idle mode 20 μA
Control Logic
Logic Supply Voltage Range V
DD
Operating 4.5 5.0 5.5 V
Logic Input Voltage V
IN(1)
2.0 V
V
IN(0)
0.8 V
Logic Input Current I
IN(1)
V
IN
= 2.0 V <1.0 ±20 μA
(except ENABLE) I
IN(0)
V
IN
= 0.8 V <1.0 ±20 μA
ENABLE Input Current I
EN(1)
V
EN
= 2.0 V 40 100 μA
I
EN(0)
V
EN
= 0.8 V 16 30 μA
OSC Input Frequency f
OSC
2.9 — 6.1 MHz
OSC Input Duty Cycle 40 60 %
OSC Input Hysterisis ΔV
IN
200 — 400 mV
Reference Input Voltage Range V
REF
Operating 0 2.6 V
continued next page ...
DMOS Dual Full-Bridge PWM Motor Driver
A3974
5
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Limits
Characteristic Symbol Test Conditions Min. Typ. Max. Units
Control Logic (continued)
Reference Input Current I
REF
V
REF
= 2.6 V ±1.0 μA
Reference Input Offset Voltage V
IO
±10 mV
Reference Divider Ratio V
REF
/V
S
D16 = 1 10
D16 = 0 5.0
Gain (G
m
) Error (note 3) E
G
V
REF
= 2.6 V, D16 = 0 0 ±4.0 %
V
REF
= 0.5 V, D16 = 0 0 ±14 %
V
REF
= 2.6 V, D16 = 1 0 ±4.0 %
V
REF
= 0.5 V, D16 = 1 0 ±10 %
Propagation Delay Time t
pd
50% TO 90%:
PWM change to source on 600 750 1000 ns
PWM change to source off 50 150 350 ns
PWM change to sink on 600 750 1000 ns
PWM change to sink off 50 150 350 ns
Crossover Delay Time t
COD
SR enabled 300 600 1000 ns
Thermal Shutdown Temperature T
J
— 165 — °C
Thermal Shutdown Hysteresis ΔT
J
— 15 — °C
UVLO Enable Threshold V
UVLO
Increasing V
DD
3.9 4.2 4.45 V
UVLO Hysteresis ΔV
UVLO
0.05 0.10 V
Logic Supply Current I
DD
f
PWM
< 50 kHz 10 mA
Outputs off 8.0 mA
Idle mode (D18 = 1, D19 = 0) 1.5 mA
Sleep mode (inputs below 0.5 V) 100 μA
NOTES: 1. Typical Data is for design information only.
2. Negative current is de ned as coming out of (sourcing) the speci ed device terminal.
3. E
G
= [(V
REF
/Range) - V
S
]/(V
REF
/Range).
ELECTRICAL CHARACTERISTICS at T
A
= +25°C, V
BB
= 50 V, V
DD
= 5.0 V, f
PWM
< 50 kHz (unless
otherwise noted), continued.

A3974SED

Mfr. #:
Manufacturer:
Description:
IC MOTOR DRIVER 4.5V-5.5V 44PLCC
Lifecycle:
New from this manufacturer.
Delivery:
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