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AD5532ABCZ-1REEL

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
32-Channel, 14-Bit
Voltage-Output DAC
AD5532
Rev. D
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However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.326.8703 © 2010 Analog Devices, Inc. All rights reserved.
FEATURES
High integration:
32-channel DAC in 12 mm × 12 mm CSPBGA
Adjustable voltage output range
Guaranteed monotonic
Readback capability
DSP/microcontroller compatible serial interface
Output impedance:
0.5 Ω (AD5532-1, AD5532-2)
500 Ω (AD5532-3)
1 kΩ (AD5532-5)
Output voltage span:
10 V (AD5532-1, AD5532-3, AD5532-5)
20 V (AD5532-2)
Infinite sample-and-hold capability to ±0.018% accuracy
Temperature range −40°C to +85°C
APPLICATIONS
Automatic test equipment
Optical networks
Level setting
Instrumentation
Industrial control systems
Data acquisition
Low cost I/O
GENERAL DESCRIPTION
The AD5532
1
is a 32-channel, 14-bit voltage-output DAC with
an additional infinite sample-and-hold mode. The selected
DAC register is written to via the 3-wire serial interface; V
OUT
for this DAC is then updated to reflect the new contents of the
DAC register. DAC selection is accomplished via Address Bits
A0–A4. The output voltage range is determined by the offset
voltage at the OFFS_IN pin and the gain of the output amplifier.
It is restricted to a range from V
SS
+ 2 V to V
DD
– 2 V because of
the headroom of the output amplifier.
The device is operated with AV
CC
= 5 V ± 5%; DV
CC
= 2.7 V to
5.25 V; V
SS
= −4.75 V to −16.5 V; and V
DD
= 8 V to 16.5 V. The
AD5532 requires a stable 3 V reference on REF_IN as well as an
offset voltage on OFFS_IN.
PRODUCT HIGHLIGHTS
1. 32-channel, 14-bit DAC in one package, guaranteed
monotonic.
2. Available in a 74-lead CSPBGA package with a body size of
12 mm ×12 mm.
3. Droopless/infinite sample-and-hold mode.
00939-C-001
SCLK D
IN
D
OUT
A4–A0 CAL OFFSET_SEL
AD5532
ADDRESS INPUT REGISTER
DAC
DAC
ADC
MUX DAC
MODE
14-BIT BUS
V
IN
TRACK/RESET
BUSY
DAC_GND
AGND
DGND
INTERFACE
CONTROL
LOGIC
SER/PAR
DV
CC
V
OUT
0
OFFS_OUT
V
OUT
31
AV
CC
REF_IN REF_OUT OFFS_IN V
DD
V
SS
WR
SYNC/CS
Figure 1. Functional Block Diagram
AD5532* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
View a parametric search of comparable parts.
EVALUATION KITS
• AD5532 Evaluation Board
DOCUMENTATION
Data Sheet
• AD5532: 32-Channel, 14-Bit Voltage-Output DAC Data
Sheet
Product Highlight
• Extending the
dense
DAC™ Multichannel D/As
REFERENCE MATERIALS
Solutions Bulletins & Brochures
• Digital to Analog Converters ICs Solutions Bulletin
DESIGN RESOURCES
• AD5532 Material Declaration
• PCN-PDN Information
• Quality And Reliability
• Symbols and Footprints
DISCUSSIONS
View all AD5532 EngineerZone Discussions.
SAMPLE AND BUY
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TECHNICAL SUPPORT
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number.
DOCUMENT FEEDBACK
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AD5532
Rev. D | Page 2 of 20
TABLE OF CONTENTS
Specifications ..................................................................................... 3
ISHA Mode .................................................................................... 5
Timing Characteristics ..................................................................... 6
Parallel Interface ........................................................................... 6
Parallel Interface Timing Diagrams ........................................... 6
Serial Interface .............................................................................. 7
Absolute Maximum Ratings ............................................................ 8
ESD Caution .................................................................................. 8
Pin Configuration and Function Descriptions ............................. 9
Terminology .................................................................................... 11
Dac Mode .................................................................................... 11
ISHA Mode .................................................................................. 11
Typical Performance Characteristics ........................................... 12
Functional Description .................................................................. 14
Output Buffer Stage—Gain and Offset.................................... 14
Offset Voltage Channel .............................................................. 14
Reset Function ............................................................................ 14
ISHA Mode ................................................................................. 14
Analog Input (ISHA Mode) ...................................................... 14
TRACK
Function (ISHA Mode) .............................................. 15
Modes of Operation ................................................................... 15
Serial Interface ............................................................................ 16
Parallel Interface (ISHA Mode Only) ...................................... 17
Microprocessor Interfacing ....................................................... 17
Application Circuits ................................................................... 18
Power Supply Decoupling ......................................................... 19
Outline Dimensions ....................................................................... 20
Ordering Guide .......................................................................... 20
REVISION HISTORY
6/10—Data Sheet Changed from Rev. C to Rev. D
Changes to Table 5 ...................................................................... 8
Changes to Ordering Guide .................................................... 20
6/04—Data Sheet Changed from Rev. B to Rev. C
Updated Format ........................................................... Universal
Changed LFBGA to CSPBGA .................................... Universal
Changes to Outline Dimensions ............................................. 24
Changes to Ordering Guide .................................................... 24
6/02—Data Sheet Changed from Rev. A to Rev. B
Term SHA changed to ISHA ........................................... Global
Changes to Absolute Maximum Ratings ................................. 6
Changes to Ordering Guide ...................................................... 6
Changes to Functional Description ....................................... 11
Changes to Table 8 .................................................................... 11
Changes to ISHA Mode ........................................................... 11
Added Figure 27 and accompanying text .............................. 15
Changes to Power Supply Decoupling Section ..................... 15
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

AD5532ABCZ-1REEL

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Digital to Analog Converters - DAC 32 CH 14-BIT Bipolar VOUT
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