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TC74VHC574FK(EL,K)

P1-P3P4-P6P7-P9P10-P10
TC74VHC574F/FT/FK
2014-03-01
4
Electrical Characteristics
DC Characteristics
Test Condition Ta = 25°C
Ta =
−40 to 85°C
Characteristics Symbol
V
CC
(V)
Min Typ. Max Min Max
Unit
High-level input
voltage
V
IH
―
2.0
3.0 to 5.5
1.50
V
CC
×
0.7
―
―
―
―
1.50
V
CC
×
0.7
―
―
V
Low-level input
voltage
V
IL
―
2.0
3.0 to 5.5
―
―
―
―
0.50
V
CC
×
0.3
―
―
0.50
V
CC
×
0.3
V
I
OH
= −50 μA
2.0
3.0
4.5
1.9
2.9
4.4
2.0
3.0
4.5
―
―
―
1.9
2.9
4.4
―
―
―
High-level output
voltage
V
OH
V
IN
= V
IH
or V
IL
I
OH
= −4 mA
I
OH
= −8 mA
3.0
4.5
2.58
3.94
―
―
―
―
2.48
3.80
―
―
V
I
OL
= 50 μA
2.0
3.0
4.5
―
―
―
0.0
0.0
0.0
0.1
0.1
0.1
―
―
―
0.1
0.1
0.1
Low-level output
voltage
V
OL
V
IN
= V
IH
or V
IL
I
OL
= 4 mA
I
OL
= 8 mA
3.0
4.5
―
―
―
―
0.36
0.36
―
―
0.44
0.44
V
3-state output
off-state current
I
OZ
V
IN
= V
IH
or V
IL
V
OUT
= V
CC
or GND
5.5 ― ― ±0.25 ― ±2.50 μA
Input leakage
current
I
IN
V
IN
= 5.5 V or GND 0 to 5.5 ― ― ±0.1 ― ±1.0 μA
Quiescent supply
current
I
CC
V
IN
= V
CC
or GND 5.5 ― ― 4.0 ― 40.0 μA
Timing Requirements
(input: t
r
= t
f
= 3 ns)
Test Condition Ta = 25°C
Ta =
−40 to
85°C
Characteristics Symbol
V
CC
(V) Typ. Limit Limit
Unit
Minimum pulse width
(CK)
t
w (H)
t
w (L)
―
3.3 ± 0.3
5.0 ± 0.5
―
―
5.0
5.0
5.0
5.0
ns
Minimum set-up time t
s
―
3.3 ± 0.3
5.0 ± 0.5
―
―
3.5
3.5
3.5
3.5
ns
Minimum hold time t
h
―
3.3 ± 0.3
5.0 ± 0.5
―
―
1.5
1.5
1.5
1.5
ns
TC74VHC574F/FT/FK
2014-03-01
5
AC Characteristics
(input: t
r
= t
f
= 3 ns)
Test Condition Ta = 25°C
Ta =
−40 to 85°C
Characteristics Symbol
V
CC
(V) C
L
(pF) Min Typ. Max Min Max
Unit
15 ― 8.5 13.2 1.0 15.5
3.3 ± 0.3
50 ― 11.0 16.7 1.0 19.0
15 ― 5.6 8.6 1.0 10.0
Propagation delay
time
(CK-Q)
t
pLH
t
pHL
―
5.0 ± 0.5
50 ― 7.1 10.6 1.0 12.0
ns
15 ― 8.2 12.8 1.0 15.0
3.3 ± 0.3
50 ― 10.7 16.3 1.0 18.5
15 ― 5.9 9.0 1.0 10.5
3-state output enable
time
t
pZL
t
pZH
R
L
= 1 kΩ
5.0 ± 0.5
50 ― 7.4 11.0 1.0 12.5
ns
3.3 ± 0.3 50 ― 11.0 15.0 1.0 17.0
3-state output disable
time
t
pLZ
t
pHZ
R
L
= 1 kΩ
5.0 ± 0.5 50 ― 7.1 10.1 1.0 11.5
ns
15 80 125 ― 65 ―
3.3 ± 0.3
50 50 75 ― 45 ―
15 130 180 ― 110 ―
Maximum clock
frequency
f
max
―
5.0 ± 0.5
50 85 115 ― 75 ―
MHz
3.3 ± 0.3 50 ― ― 1.5 ― 1.5
Output to output skew
t
osLH
t
osHL
(Note 1)
5.0 ± 0.5 50 ― ― 1.0 ― 1.0
ns
Input capacitance C
IN
― ― 4 10 ― 10 pF
Output capacitance C
OUT
― ― 6 ― ― ― pF
Power dissipation
capacitance
C
PD
(Note 2) ― 28 ― ― ― pF
Note 1: Parameter guaranteed by design.
t
osLH
= |t
pLHm
− t
pLHn
|, t
osHL
= |t
pHLm
− t
pHLn
|
Note 2: C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
I
CC (opr)
= C
PD
·V
CC
·f
IN
+ I
CC
/8 (per F/F)
And the total C
PD
when n pcs. of latch operate can be gained by the following equation:
C
PD
(total) = 20 + 8·n
TC74VHC574F/FT/FK
2014-03-01
6
Noise Characteristics
(input: t
r
= t
f
= 3 ns)
Test Condition Ta = 25°C
Characteristics Symbol
V
CC
(V) Typ. Max
Unit
Quiet output maximum dynamic V
OL
V
OLP
C
L
= 50 pF 5.0 0.8 1.0 V
Quiet output minimum dynamic V
OL
V
OLV
C
L
= 50 pF 5.0 −0.8 −1.0 V
Minimum high level dynamic input voltage V
IHD
C
L
= 50 pF 5.0 ― 3.5 V
Maximum low level dynamic input voltage V
ILD
C
L
= 50 pF 5.0 ― 1.5 V
Input Equivalent Circuit
INPUT
P1-P3P4-P6P7-P9P10-P10

TC74VHC574FK(EL,K)

Mfr. #:
Buy TC74VHC574FK(EL,K)
Manufacturer:
Toshiba
Description:
Flip Flops CMOS Logic IC 5.6ns 8mA 2.0 to 5.5V
Lifecycle:
New from this manufacturer.
Delivery:
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