INDUSTRIAL TEMPERATURE RANGE
4
IDT74LVCH16374A
3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP
NOTE:
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.
TA = – 40°C to + 85°C.
OUTPUT DRIVE CHARACTERISTICS
Symbol Parameter Test Conditions
(1)
Min. Max. Unit
V
OH Output HIGH Voltage VCC = 2.3V to 3.6V IOH = – 0.1mA VCC – 0.2 — V
VCC = 2.3V IOH = – 6mA 2 —
VCC = 2.3V IOH = – 12mA 1.7 —
VCC = 2.7V 2.2 —
VCC = 3V 2.4 —
VCC = 3V IOH = – 24mA 2.2 —
VOL Output LOW Voltage VCC = 2.3V to 3.6V IOL = 0.1mA — 0.2 V
VCC = 2.3V IOL = 6mA — 0.4
IOL = 12mA — 0.7
VCC = 2.7V IOL = 12mA — 0.4
VCC = 3V IOL = 24mA — 0.55
OPERATING CHARACTERISTICS, VCC = 3.3V ± 0.3V, TA = 25°C
Symbol Parameter Test Conditions Typical Unit
CPD Power Dissipation Capacitance per Flip-Flop Outputs enabled CL = 0pF, f = 10Mhz 58 pF
CPD Power Dissipation Capacitance per Flip-Flop Outputs disabled 24
SWITCHING CHARACTERISTICS
(1)
VCC = 2.7V VCC = 3.3V ± 0.3V
Symbol Parameter Min. Max. Min. Max. Unit
fMAX 150 — 150 — M H z
tPLH Propagation Delay — 4.9 1.5 4.5 ns
tPHL xCLK to xQx
tPZH Output Enable Time — 5.3 1.5 4.6 ns
tPZL xOE to xQx
tPHZ Output Disable Time — 6.1 1.5 5.5 ns
tPLZ xOE to xQx
tSU Set-up Time HIGH or LOW, data before CLK↑ 1.9 — 1.9 — ns
tH Hold Time HIGH or LOW, data after CLK↑ 1.1 — 1.1 — ns
tW Pulse duration, CLK HIGH or LOW 3.3 — 3.3 — ns
tSK(o) Output Skew
(2)
—— —500 ps
NOTES:
1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.