Page 1 of 2
LVDS Add On Board P/N 4162122-01
Jumper Settings :
JP1- Clock phase selection (Default 1-2 closed)
Change this setting to obtain best quality.
JP2 - Panel voltage selection
1-3, 2-4 closed : 12V panel
3-5, 4-6 closed : 3.3 / 5V panel (Default)
JP3 – Enable DE signal on signal or dual LVDS transmitter chip at even pixel side
1-2 closed : Enable DE signal on both LVDS transmitter chips (U1 & U2) (Default - Use for all panels)
2-3 closed : Enable DE signal on single LVDS transmitter chip (U1)
(Use for all panel except : Sharp LQ160E1LG08 and Sharp LQ181E1LW31)
Compatible with LVDS board :
Old LVDS board Jumper setting on LVDS board P/N 4162122-01
P/N 4162122-00 JP1 : 2-3 closed ; JP2 : 1-3,2-4 closed ; JP3 : 1-2 closed
P/N 4106886-64 JP1 : 2-3 closed ; JP2 : 3-5,4-6 closed ; JP3 : 2-3 closed
P/N 4162138-10 JP1 : 1-2 closed ; JP2 : 3-5,4-6 closed ; JP3 : 2-3 closed
P/N 4162140-10 JP1 : 1-2 closed ; JP2 : 3-5,4-6 closed ; JP3 : 1-2 closed
(Connect with CN5 only)
Use of connectors :
Connector Connector type
CN2 Hirose DF11-28DS-2DSA
CN3 Hirose DF11-32DS-2DSA
CN4 Hirose DF11-20DF-2DSA
CN5 Hirose DF14-20P-1.25P
CN6 Hirose DF14-20P-1.25P
The LVDS add-on board P/N 4162122-01 design for dual pixel LVDS panels. It
provides jumper setting to select the Data Enable (DE) signal on transmitter chips.