EVB-EN2360QI

Enpirion
®
Power Evaluation Board User Guide
EN2360QI PowerSoC
Alternatively, you can control the ENA jumper with an external source. For dual supply
mode, you can also tie Enable to AVIN by removing NR1 from the back side, putting a
short across the FB1 footprint, and connecting the middle point of J3 to the left pin using
a shorting jumper. Please review the Power Up Sequence section in the datasheet
before experimenting with various turn on/off combinations.
CAUTION: Please refer to the datasheet for the maximum voltages on the 12V
(PVIN) and AVIN inputs, and maximum slew rates for the PVIN input.
STEP 6A: Power Up/Down Behavior Connect a pulse generator (output disabled)
signal to the clip-on test point below ENA and Ground. Set the pulse amplitude to swing
from 0 to 2.5 volts. Set the pulse period to 10msec. and duty cycle to 50%. Hook up
oscilloscope probes to ENA, SS, POK and VOUT with clean ground returns. Apply
power to evaluation board. Enable pulse generator output. Observe the SS capacitor
and VOUT voltage ramps as ENA goes high and again as ENA goes low. The device
when powered down ramps down the output voltage in a controlled manner before fully
shutting down. The output voltage level when POK is asserted /de-asserted as the
device is powered up / down may be observed as well as the clean output voltage ramp
and POK signals.
STEP 7: External Clock Synchronization / Spread Spectrum Modes: In order to
activate this mode, it may be necessary to a solder a SMA connector at J4. Alternately
the input clock signal leads may be directly soldered to the through holes of J4 as
shown below.
Figure 3: SMA Connector for External Clock Input
GND
Ext. Clock
Page 4 of 10
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Enpirion
®
Power Evaluation Board User Guide
EN2360QI PowerSoC
Power down the device. Move ENA into disable position. Connect the clock signal as
just indicated. The clock signal should be clean and have a frequency range specified in
the datasheet, and an amplitude 0 to 2.5 volts with a duty cycle between 20 and 80%.
With S_IN signal disabled, power up the device and move ENA jumper to Enabled
position. The device is now powered up and outputting the desired voltage. The device
is switching at its free running frequency. The switching waveform may be observed
between test points SW and GND. Now enabling the S_IN signal will automatically
phase lock the internal switching frequency to the externally applied frequency as long
as the external clock parameters are within the specified range. To observe phase-lock
connect oscilloscope probes to the input clock as well as to the SW test point. Phase
lock range can be determined by sweeping the external clock frequency up / down until
the device just goes out of lock at the two extremes of its range.
For spread spectrum operation the input clock frequency may be swept between two
frequencies that are within the lock range. The sweep (jitter) repetition rate should be
limited to 10 kHz. The radiated EMI spectrum may be now measured in various states
free running, phase locked to a fixed frequency and spread spectrum.
Before measuring radiated EMI, place a 10uF/0805, X7R capacitor at the input and
output edges of the PCB (C8 and C9 positions), and connect the PVIN power and the
load to the board at or near these capacitors. The added capacitor at the input edge is
for high-frequency decoupling of the input cables. The one added at the output edge is
meant to represent a typical load decoupling capacitor. We recommend doing EMI
testing in single-supply mode only as this will simplify the test setup.
Page 5 of 10
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Enpirion
®
Power Evaluation Board User Guide
EN2360QI PowerSoC
Figure 4: Evaluation Board Top and Assembly Layers.
Page 6 of 10
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EVB-EN2360QI

Mfr. #:
Manufacturer:
Intel / Altera
Description:
Power Management IC Development Tools EVAL FOR EN2360QI
Lifecycle:
New from this manufacturer.
Delivery:
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