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L6932
Multilayer ceramic caps have the lowest ESR and can be required for particular applications. Nevertheless in
several applications they are ok, the loop stability issue has to be considered (see loop stability section).
Below a list of some suggested capacitor manufacturers.
Loop Stability
The stability of the loop is affected by the zero introduced by the output capacitor.
The time constant of the zero is given by:
This zero helps to increase the phase margin of the loop until the time constant is higher than some hundreds
of nsec, depending also on the output voltage and current.
So, using very low ESR ceramic capacitors could produce oscillations at the output, in particular when regulating
high output voltages (adjustable version).
To solve this issue is sufficient to add a small capacitor (e.g. 1nF to 10nF) in parallel to the high side resistor of
the external divider, as shown in figure 9.
Figure 9. Compensation Network
Thermal Considerations
Since the device is housed in a small SO(4+2+2) package the thermal issue can be the bottleneck of many ap-
plications. The power dissipated by the device is given by:
P
DISS
= (V
IN
- V
OUT
) · I
OUT
Manufacturer Type Cap Value (µF) Rated Voltage (V)
PANASONIC CERAMIC 1 to 47 4 to 16
TAYO YUDEN CERAMIC 1 to 47 4 to 16
TDK CERAMIC 1 to 47 4 to 16
TOKIN CERAMIC 1 to 47 4 to 16
SANYO POSCAP 1 to 47 4 to 16
PANASONIC SP 1 to 47 4 to 16
KEMET TANTALUM 1 to 47 4 to 16
TESRC
OUT
= F
ZERO
1
2π ESR C
OUT
------- ---- --------------- ----- -------------=
VOUT=1.2V TO 5V UP to 2A
VIN=2V TO 14V
C1
OUT
1
3
7
5
6
4
8
2
L6932D1.2
GND
C2
IN
EN
ADJ
R1
R2
C3
L6932
8/11
The thermal resistance junction to ambient of the demoboard is approximately 62°C/W. This mean that, consid-
ering an ambient temperature of 60°C and a maximum junction temperature of 150°C, the maximum power that
the device can handle is 1.5W.
This means that the device is able to deliver a DC output current of 2A only with a very low dropout.
In many applications, high output current pulses are required. If their duration is shorter than the thermal con-
stant time of the board, the thermal impedance (not the thermal resistance) has to be considered.
In figure 10 the thermal impedance versus the duration of the current pulse for the SO(4+2+2) mounted on board
is shown.
Figure 10. Thermal Impedance
Considering a pulse duration of 1sec, the thermal impedance is close to 20°C/W, allowing much bigger power
dissipated.
Example:
Vin = 3.3V
Vout = 1.8V
Iout = 2A
Pulse Duration = 1sec
The power dissipated by the device is:
P
DISS
= (V
IN
- V
OUT
) · I
OUT
= 1.5 · 2 3W
Considering a thermal impedance of 20°C/W, the maximum junction temperature will be:
T
J
= T
A
+ Z
THJA
· P
DISS
= 60 + 60 = 120°C
Obviously, with pulse durations longer than approximately 10sec the thermal impedance is very close to the
thermal resistance (60°C/W to 70°C/W).
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L6932
Figure 11. SO-8 Mechanical Data & Package Dimensions
OUTLINE AND
MECHANICAL DATA
DIM.
mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 1.35 1.75 0.053 0.069
A1 0.10 0.25 0.004 0.010
A2 1.10 1.65 0.043 0.065
B 0.33 0.51 0.013 0.020
C 0.19 0.25 0.007 0.010
D
(1)
4.80 5.00 0.189 0.197
E 3.80 4.00 0.15 0.157
e 1.27 0.050
H 5.80 6.20 0.228 0.244
h 0.25 0.50 0.010 0.020
L 0.40 1.27 0.016 0.050
k (min.), 8˚ (max.)
ddd 0.10 0.004
Note: (1) Dimensions D does not include mold flash, protru-
sions or gate burrs.
Mold flash, potrusions or gate burrs shall not exceed
0.15mm (.006inch) in total (both side).
SO-8
0016023 C

L6932D1.5TR

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
IC REG LINEAR 1.5V 2A 8SO
Lifecycle:
New from this manufacturer.
Delivery:
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Payment:
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