MGJ6 Full Bridge Series
5.7kVDC Isolated 6W Triple Output Gate Drive SM DC/DC Converters
KDC_MGJ6C-FB.A02 Page 7 of 12
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APPLICATION NOTES
Start-up times
Part No.
Start-up times
ms
MGJ6T05F24MC 30
MGJ6T12F24MC 30
MGJ6T24F24MC 30
Disable/Frequency synchronisation
Min Typ Max Units
Disable/Synch
(Pin is active low)
Pull Down Current
0.5 mA
Input High 2 5 V
Input Low 0 0.8 V
Synchronisation
Frequency Range 90 100 110 kHz
Duty Cycle
25 75 %
Output configurations for power switches
Component IGBT SIC MOSFET
Zener diode
1
9V1 5V1 9V1
Resistor 15K 18K 15K
Typical start up times for this series, with recommended
maximum additional output capacitance are:
Output capacitance must not exceed:
Please refer to application notes for further information.
The Disable/Synchronization pin has three modes:
1. When a dc logic low voltage is applied to this pin the MGJ6 is disabled and enters a low quiescent current sleep mode.
2. When this pin is left floating or a dc logic high (CMOS/TTL compatible) voltage is applied the MGJ6 is enabled and operates at the programmed frequency of 100kHz.
3. When a square wave of between 90kHz and 110kHz is applied to this pin, the switcher operates at the same frequency as the square wave. The falling edge of the
square wave corresponds to the start of the switching cycle. If the signal is slower than 25Hz, it will be interpreted as enabling and disabling the part. If the MGJ6 is
disabled, it must be disabled for 7 clock cycles before being re-enabled.
1. Suggested zener diode is BZX84C.
There are several zener based divider circuits that can be used to configure a bipolar output for gate drives as shown below. The table below shows suggested component
values for various power switches using circuit A.
+24V
0V
0V
+Vgate
-Vgate
+24V
0V
0V
+Vgate
-Vgate
GATE
DRIVER
Vdd
Vss
Out
+24V
0V
IGBT
ABC
Output Voltage
Maximum output
capacitance
VµF
24 VHA 27
24 VHB 27
24 VL 56
