NOTE: Please contact IDT (see last page) if a different configuration is desired.
1/16/2017 Product Ordering Guide
Page 16
©2017 Integrated Device Technology, Inc.
Address Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 REF
N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A
P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off CP/+/Off
I2C 0b1010000 DIVA DIVB DIVC DIVD DIVE DIVF DIVG DIVH DIVI DIVI DIVJ DIVJ XTAL
2-Byte N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A 1
125 N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A
CN/+/On P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off CP/+/Off
I2C 0b1010000 DIVA DIVB DIVC DIVD DIVE DIVF DIVG DIVH DIVI DIVI DIVJ DIVJ XTAL
1-Byte 32 N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A 1
N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A
N/A N/A N/A
P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off CP/+/Off
I2C 0b1010000 DIVA DIVB DIVC DIVD DIVE DIVF DIVG DIVH DIVI DIVI DIVJ DIVJ XTAL
1-Byte N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A 1
N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A
P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off CP/+/Off
I2C 0b1010000 DIVA DIVB DIVC DIVD DIVE DIVF DIVG DIVH DIVI DIVI DIVJ DIVJ XTAL
1-Byte N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A 1
N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A
P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off CP/+/Off
I2C 0b1010000 DIVA DIVB DIVC DIVD DIVE DIVF
DIVG DIVH DIVI DIVI DIVJ DIVJ XTAL
1-Byte N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A 1
PreScale
*2Crystal 43.5 3480
43.5
50
3480
3480
4000
Crystal 43.5*2
-994
0b1101100 OTP
40
-993
0b1101100 EEPROM
40
-992
0b1101100 EEPROM
40
*2
*2
Crystal
Crystal
-991
0b1101100 EEPROM
40
Device Address
EEPROM
Addressing
Code
(ddd)
Serial Port
Protocol
Boot Method
Crystal
Frequency
(10M~40MHz)
VCO
Frequency (M)
Output Frequency (MHz)
Total Divide Ratio
Frequency Source
Output Style (P = LVPECL, D=LVDS, CP = LVCMOS in-phase, CN = LVCMOS out-of-phase)
Inversion (-) or non-inversion (+)
Power-up State
CLK_SEL FB Divider
43.5 3480-998
0b1101100 EEPROM
40 Crystal *2