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TC7WH74FK,LJ(CT

P1-P3P4-P6P7-P7
TC7WH74FU/FK
2009-09-28
1
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC7WH74FU,TC7WH74FK
D-Type flip flop with preset and clear
Features
• High speed: f
MAX
= 170 MHz (typ.) at V
CC
= 5V
• Low power dissipation: I
CC
= 2μA (max) at Ta = 25°C
• High noise immunity: V
NIH
= V
NIL
= 28% V
CC
(min)
• 5.5-V tolerant inputs
• Balanced propagation delays: t
pLH
∼
−
t
pHL
• Wide operating voltage range: V
CC
= 2 to 5.5V
Marking
SM8 US8
Absolute Maximum Ratings
(Ta = 25°C)
Characteristics Symbol Rating Unit
Supply voltage V
CC
−0.5 to 7.0 V
DC input voltage V
IN
−0.5 to 7.0 V
DC output voltage V
OUT
−0.5 to V
CC
+ 0.5 V
Input diode current I
IK
−20 mA
Output diode current I
OK
±20 ( Note 1) mA
DC output current I
OUT
±25 mA
DC V
CC
/ground current I
CC
±50 mA
300 (SM8)
Power dissipation P
D
200 (US8)
mW
Storage temperature T
stg
−65 to 150 °C
Lead temperature (10 s) T
L
260 °C
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: V
OUT
< GND、V
OUT
> V
CC
TC7WH74FU
TC7WH74FK
Weight
SSOP8-P-0.65: 0.02 g (typ.)
SSOP8-P-0.50A: 0.01 g (typ.)
Lot No.
Product Name
W H
7 4
H 7 4
D
2
Q
3
V
CC
8
Q
5
GND
4
PR
7
CLR
6
CK
1
Pin Assignment
(top view)
（SM8）
（US8）
TC7WH74FU/FK
2009-09-28
2
IEC Logic Symbol Truth Table
X: Don’t care
Inputs Outputs
CLR PR D CK Q Q
Function
L H X X L H Clear
H L X X H L Preset
L L X X H H ⎯
H H L L H ⎯
H H H H L ⎯
H H X Q n Q n No Change
Operating Range
Characteristics Symbol Rating Unit
Supply voltage V
CC
2.0 to 5.5 V
Input voltage V
IN
0 to 5.5
V
Output voltage V
OUT
0 to V
CC
V
Operating temperature T
opr
−40 to 85 °C
0 to 100 (V
CC
= 3.3 ± 0.3 V)
Input rise and fall time dt/dv
0 to 20 (V
CC
= 5.0 ± 0.5 V)
ns/V
Q
Q
P
R
CK
D
CLR
S
C
D
R
TC7WH74FU/FK
2009-09-28
3
Electrical Characteristics
DC Characteristics
Ta = 25°C Ta = −40 to 85°C
Characteristics Symbol Test Condition
V
CC
(V)
Min Typ. Max Min Max
Unit
2.0 1.5 ⎯ ⎯ 1.5 ⎯
High-level input voltage V
IH
⎯
3.0 to
5.5
V
CC
× 0.7
⎯ ⎯
V
CC
× 0.7
⎯
V
2.0 ⎯ ⎯ 0.5 ⎯ 0.5
Low-level input voltage V
IL
⎯
3.0 to
5.5
⎯ ⎯
V
CC
× 0.3
⎯
V
CC
× 0.3
V
2.0 1.9 2.0 ⎯ 1.9 ⎯
3.0 2.9 3.0 ⎯ 2.9 ⎯
I
OH
= −50 μA
4.5 4.4 4.5
⎯ 4.4 ⎯
I
OH
= −4 mA 3.0 2.58 ⎯ ⎯ 2.48 ⎯
High-level output voltage V
OH
V
IN
= V
IH
or V
IL
I
OH
= −8 mA 4.5 3.94 ⎯ ⎯ 3.80 ⎯
V
2.0 ⎯ 0.0 0.1 ⎯ 0.1
3.0 ⎯ 0.0 0.1 ⎯ 0.1
I
OL
= 50 μA
4.5
⎯ 0.0 0.1 ⎯ 0.1
I
OL
= 4 mA 3.0 ⎯ ⎯ 0.36 ⎯ 0.44
Low-level output voltage V
OL
V
IN
= V
IH
or V
IL
I
OL
= 8 mA 4.5 ⎯ ⎯ 0.36 ⎯ 0.44
V
Input leakage current I
IN
V
IN
= 5.5 V or GND 0 to 5.5 ⎯ ⎯ ±0.1 ⎯ ±1.0 μA
Quiescent supply current I
CC
V
IN
= V
CC
or GND 5.5 ⎯ ⎯ 2.0 ⎯ 20.0 μA
TIMING REQUIREMENTS
(unless otherwise specified, Input: t
r
=
t
f
=
3 ns )
Ta = 25°C Ta = −40 to 85°C
Characteristics Symbol Test Condition
V
CC
(V) Limit Limit
Unit
3.3 ± 0.3 6.0 7.0 Minimum pulse width
(CK)
t
W
(L)
t
W
(H)
5.0
± 0.5 5.0 5.0
3.3 ± 0.3 6.0 7.0 Minimum pulse width
(
CLR , PR )
t
W
(L)
5.0
± 0.5 5.0 5.0
3.3 ± 0.3 6.0 7.0
Minimum setup time t
s
5.0
± 0.5 5.0 5.0
3.3 ± 0.3 0.5 0.5
Minimum hold time t
h
5.0
± 0.5 0.5 0.5
3.3 ± 0.3 5.0 5.0 Minimum removal time
(
CLR , PR )
t
rem
5.0
± 0.5 3.0 3.0
ns
P1-P3P4-P6P7-P7

TC7WH74FK,LJ(CT

Mfr. #:
Buy TC7WH74FK,LJ(CT
Manufacturer:
Toshiba
Description:
Flip Flops L-MOS LOGIC (VHS)
Lifecycle:
New from this manufacturer.
Delivery:
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