5
ICS932S801
0959C—03/13/06
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 3.8V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to V
DD
+3.8 V
Ambient Operating Temperature . . . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
ESD Protection . . . . . . . . . . . . . . . . . . . . . . . . Input ESD protection usung human body model > 1KV
Stresses above those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. These
ratings are stress specifications only and functional operation of the device at these or any other conditions above those
listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
T
A
= 0 - 70°C; Supply Voltage V
DD
= 3.3 V +/-5%
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES
Input High Voltage
V
IH
3.3 V +/-5% 2
V
DD
+ 0.3
V1
Input Low Voltage
V
IL
3.3 V +/-5%
V
SS
- 0.3
0.8 V 1
Input High Current
I
IH
V
IN
= V
DD
-5 5 uA 1
I
IL1
V
IN
= 0 V; Inputs with no pull-up
resistors
-5 uA 1
I
IL2
V
IN
= 0 V; Inputs with pull-up resistors
-200 uA 1
Operating Current
I
DD3.3OP
all outputs driven 325 mA
Powerdown Current
I
DD3.3PD
100 mA
In
ut Fre
uenc
3
F
i
V
DD
= 3.3 V
14.31818 MHz 3
Pin Inductance
1
L
pin
7nH1
C
IN
Logic Inputs 5 pF 1
C
OUT
Output pin capacitance 6 pF 1
C
INX
X1 & X2 pins 5 pF 1
Clk Stabilization
1,2
T
STAB
From V
DD
Power-Up or de-assertion of
PD# to 1st clock
3ms1,2
Modulation Fre
uenc
Trian
ular Modulation 30 33 kHz 1
SMBus Voltage
V
DD
2.7 5.5 V 1
Low-level Output Voltage
V
OL
@ I
PULLUP
0.4 V 1
Current sinking at V
OL
= 0.4 V I
PULLUP
4mA1
SCLK/SDATA
Clock/Data Rise Time
3
T
RI2C
(Max VIL - 0.15) to (Min VIH + 0.15) 1000 ns 1
SCLK/SDATA
Clock/Data Fall Time
3
T
FI2C
(Min VIH + 0.15) to (Max VIL - 0.15) 300 ns 1
1
Guaranteed b
desi
n and characterization, not 100% tested in
roduction.
2
See timin
dia
rams for timin
re
uirements.
3
Input frequency should be measured at the REFOUT pin and tuned to ideal 14.31818MHz to meet
ppm frequency accuracy on PLL outputs.
Input Low Current
Input Capacitance
1
