LT1970
10
1970fe
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block DiagraM anD TesT circuiT
applicaTions inForMaTion
3
19
7
9
8
17
16
18
15
12
13
+
+
+
I
SINK
1970TC
R
FIL
1k
R
CS
R
LOAD
1k
I
SRC
D2
D1
1×
Q1
Q2
4
5
6
2
GM1
ENABLE
COMMON
VC
SRC
VC
SRC
VC
SNK
5V
15V
VC
SNK
ISRC
ISNK
–IN
V
IN
R
G
1k
+IN
ENABLE
TSD
14
V
CC
V
+
15V
–15V
OUT
SENSE
+
FILTER
SENSE
V
V
EE
1, 10, 11, 20
10k
10k
10k
R
FB
1k
V
SRC
+
V
SNK
+
+
The LT1970 power op amp with precision controllable
current limit is a flexible voltage and current source
module. The drawing on the front page of this data sheet
is representative of the basic application of the circuit,
however many alternate uses are possible with proper
understanding of the sub circuit capabilities.
CIRCUIT DESCRIPTION
Main Operational Amplifier
Sub circuit block GM1, the 1X unity-gain current buffer
and output transistors Q1 and Q2 form a standard opera
-
tional amplifier. This amplifier has ± 500mA current output
capability and a 3.6MHz gain bandwidth product. Most
applications of the LT1970 will use this op amp in the main
signal path. All conventional op amp cir
cuit configurations
are supported. Inverting, noninverting, filter, summation
or nonlinear circuits may be implemented in a conven
-
tional manner. The output stage includes current limiting
at ±800mA to protect against fault conditions. The input
stage has high differential breakdown of 36V minimum
between –IN and +IN. No current will flow at the inputs
when differential input voltage is present. This feature is
important when the precision current sense amplifiers
“I
SINK
” and “I
SRC
” become active.
Current Limit Amplifiers
Amplifier stages “I
SINK
” and “I
SRC
” are very high transcon-
ductance amplifier stages with independently controlled
offset voltages. These amplifiers monitor the voltage be-
tween input pins SENSE
+
and SENSE
which usually sense
the voltage across a small external current sense resistor.
The transconductance amplifiers outputs connect to the
same high impedance node as the main input stage GM1
amplifier. Small voltage differences between SENSE
+
and
SENSE
, smaller than the user set VC
SNK
/10 and VC
SRC
/10
in magnitude, cause the current limit amplifiers to decouple
from the signal path. This is functionally indicated by diodes
D1 and D2 in the Block Diagram. When the voltage V
SENSE
increases in magnitude sufficient to equal or overcome one
of the offset voltages VC
SNK
/10 or VC
SRC
/10, the appropri-
ate current limit amplifier becomes active and because of
LT1970
11
1970fe
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applicaTions inForMaTion
its very high transconductance, takes control from the input
stage, GM1. The output current is regulated to a value of
I
OUT
= V
SENSE
/R
SENSE
= (VC
SRC
or VC
SNK
)/(10 • R
SENSE
).
The time required for the current limit amplifiers to take
control of the output is typically 4µs.
Linear operation of the current limit sense amplifier occurs
with the inputs SENSE
+
and SENSE
ranging between V
CC
– 1.5V and V
EE
+ 1.5
V
. Most applications will connect pins
SENSE
+
and OUT together, with the load on the opposite
side of the external sense resistor and pin SENSE
. Feed-
back to the inverting input of GM1 should be connected
from SENSE
to –IN. Ground side sensing of load current
may be employed by connecting the load between pins
OUT and SENSE
+
. Pin SENSE
would be connected to
ground in this instance. Load current would be regulated
in exactly the same way as the conventional connection.
However, voltage mode accuracy would be degraded in
this case due to the voltage across R
SENSE
.
Creative applications are possible where pins SENSE
+
and
SENSE
monitor a parameter other than load current. The
operating principle that at most one of the current limit
stages may be active at one time, and that when active,
the current limit stages take control of the output from
GM1, can be used for many different signals.
Current Limit Threshold Control Buffers
Input pins VC
SNK
and VC
SRC
are used to set the response
thresholds of current limit amplifiers “I
SINK
” and “I
SRC
”.
Each of these inputs may be independently driven by a
voltage of 0V to 5V above the COMMON reference pin.
The 0V to 5V input voltage is attenuated by a factor of 10
and applied as an offset to the appropriate current limit
amplifier. AC signals may be applied to these pins. The AC
bandwidth from a V
C
pin to the output is typically 2MHz.
For proper operation of the LT1970, these control inputs
cannot be left floating.
For low V
CC
supply applications it is important to keep
the maximum input control voltages, VC
SRC
and VC
SNK
,
at least 2.5V below the V
CC
potential. This ensures linear
control of the current limit threshold. Reducing the current
limit sense resistor value allows high output current from
a smaller control voltage which may be necessary if the
V
CC
supply is only 5V.
The transfer function from V
C
to the associated V
OS
is
linear from about 0.1V to 5V in, or 10mV to 500mV at
the current limit amplifier inputs. An intentional nonlinear
-
ity is built into the transfer functions at low levels. This
nonlinearity insures that both the sink and source limit
amplifiers cannot become active simultaneously. Simul
-
taneous activation of the limit amplifiers could result in
uncontrolled outputs. As shown in the Typical Performance
Characteristics curves, the control inputs have a “hockey
stick” shape, to keep the minimum limit threshold at 4mV
for each limit amplifier
.
Figure 1 illustrates an interesting use of the current
sense input pins. Here the current limit control ampli-
fiers are used to produce a symmetrically limited output
voltage swing. Instead of monitoring the output current,
the output voltage is
divided down by a factor
of 20 and
applied to the SENSE
+
input, with the SENSE
input
grounded. When the threshold voltage between SENSE
+
and SENSE
(V
CLAMP
/10) is reached, the current limit
stage takes control of the output and clamps it a level of
±2 V
CLAMP
. With control inputs V
CSRC
and V
CSNK
tied
together, a single polarity input voltage sets the same +
and – output limit voltage for symmetrical limiting. In this
circuit the output will current limit at the built-in fail-safe
level of typically 800mA.
Figure 1. Symmetrical Output Voltage Limiting
VC
SRC
COMMON
V
EE
VC
SNK
V
FILTER
V
+
12V
EN
V
CC
ISNK
ISRC
SENSE
SENSE
+
TSD
OUT
+IN
R3
3k
80mV
TO
10V
–80mV
TO
–10V
±CLAMP
REACHED
OUTPUT CLAMPS
AT 2× V
CLAMP
V
CLAMP
OV TO 5V
V
IN
LT1970
–12V
–IN
R1
21.5k R
L
1970 F01
R2
1.13k
R
F
R
G
LT1970
12
1970fe
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applicaTions inForMaTion
ENABLE Control
The ENABLE input pin puts the LT1970 into a low sup-
ply current, high impedance output state. The ENABLE
pin responds to TTL threshold levels with respect to the
COMMON pin. Pulling the ENABLE pin low is the best
way to for
ce zero current at the output. Setting VC
SNK
=
VC
SRC
= 0V allows the output current to remain as high
as ±4mV/R
SENSE
.
In applications such as circuit testers (ATE), it may be
preferable to apply a predetermined test voltage with a
preset current limit to a test node simultaneously. The
ENABLE pin can be used to provide this gating action as
shown in Figure 2. While the LT1970 is disabled, the load
is essentially floating and the input voltage and current
limit control voltages can be set to produce the load test
levels. Enabling the LT1970 then drives the load. The
LT1970 enables and disables in just a few microseconds.
The actual enable and disable times at the load are a
function of the load reactance.
Operating Status Flags
The LT1970 has three digital output indicators; TSD, ISRC
and ISNK. These outputs are open collector drivers referred
to the COMMON pin. The outputs have 36V capabilities
and can sink in excess of 10mA. ISRC and ISNK indicate
activation of the associated current limit amplifier. The TSD
output indicates excessive die temperature has caused the
circuit to enter thermal shutdown. The three digital outputs
may be wire “OR’d” together, monitored individually or left
open. These outputs do not affect circuit operation, but
provide an indication of the present operational status of
the chip.
For slow varying output signals, the assertion of a low level
at the current limit output flags occurs when the current
limit threshold is reached. For fast moving signals where
the LT1970 output is moving at the slew limit, typically
1.6V/µs, the flag assertion can be somewhat premature
at typically 75% of the actual current limit value.
The operating status flags are designed to drive LEDs to
provide a visual indication of current limit and thermal
conditions. As such, the transition edges to and from
the active low state are not particularly sharp and may
exhibit some uncertainty. Adding some positive feedback
to the current limit control inputs helps to sharpen these
transitions.
With the values shown in Figure 3, the current limit thresh-
old is reduced by approximately 0.5% when either current
limit status flag goes low. With sharp logic transitions, the
status outputs can be used in a system control loop to
Figure 2. Using the ENABLE pin
VC
SRC
COMMON
V
EE
VC
SNK
V
FILTER
V
+
12V
EN
V
CC
ISNK
ISRC
SENSE
SENSE
+
TSD
OUT
+IN
5V
0V
5V
ENABLE
DISABLE
V
IN
LT1970
–12V
–IN
R
S
R
L
10Ω
1970 F02
R
G
10k
R
F
10k
EN
10V/DIV
0V
V
OUT
1V/DIV
5µs/DIV
0V
V
IN
= 0.5V V
IN
= –0.5V

LT1970CFE#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Operational Amplifiers - Op Amps 500mA Power OA with Adj. Current Limit
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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