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Table 2. OPERATION MODES
INC CS U/D Operation
High to Low Low High Wiper toward H
High to Low Low Low Wiper toward L
High Low to High X Store Wiper Position
Low Low to High X No Store, Return to Standby
X High X Standby
Figure 4. Potentiometer Equivalent Circuit
C
W
R
L
C
L
C
H
R
W
R
WI
R
H
Table 3. ABSOLUTE MAXIMUM RATINGS
Parameters Ratings Units
Supply Voltage
V
CC
to GND 0.5 to +7
V
Inputs
CS
to GND 0.5 to V
CC
+0.5
V
INC to GND 0.5 to V
CC
+0.5 V
U/D to GND 0.5 to V
CC
+0.5 V
H to GND 0.5 to V
CC
+0.5 V
L to GND 0.5 to V
CC
+0.5 V
W to GND 0.5 to V
CC
+0.5 V
Operating Ambient Temperature
Industrial (‘I’ suffix)
40 to +85
°C
Junction Temperature +150 °C
Storage Temperature 65 to 150 °C
Lead Soldering (10 s max) +300 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 4. RELIABILITY CHARACTERISTICS
Symbol Parameter Test Method Min Typ Max Units
V
ZAP
(Note 1) ESD Susceptibility MILSTD883, Test Method 3015 2000 V
I
LTH
(Notes 1, 2) LatchUp JEDEC Standard 17 100 mA
T
DR
Data Retention MILSTD883, Test Method 1008 100 Years
N
END
Endurance MILSTD883, Test Method 1003 1,000,000 Stores
1. This parameter is tested initially and after a design or process change that affects the parameter.
2. Latchup protection is provided for stresses up to 100 mA on address and data pins from 1 V to V
CC
+ 1 V.
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Table 5. DC ELECTRICAL CHARACTERISTICS (V
CC
= +2.5 V to +6 V unless otherwise specified)
Symbol
Parameter Conditions Min Typ Max Units
POWER SUPPLY
V
CC
Operating Voltage Range 2.5 6.0 V
I
CC1
Supply Current (Increment)
V
CC
= 6 V, f = 1 MHz, I
W
= 0 100
mA
V
CC
= 6 V, f = 250 kHz, I
W
= 0 50
mA
I
CC2
Supply Current (Write)
Programming, V
CC
= 6 V 1000
mA
V
CC
= 3 V 500
mA
I
SB1
(Note 4) Supply Current (Standby) CS = V
CC
0.3 V
U/D
, INC = V
CC
0.3 V or GND
1
mA
LOGIC INPUTS
I
IH
Input Leakage Current V
IN
= V
CC
10
mA
I
IL
Input Leakage Current V
IN
= 0 V 10
mA
V
IH2
CMOS High Level Input Voltage
2.5 V V
CC
6 V
V
CC
x 0.7 V
CC
+ 0.3 V
V
IL2
CMOS Low Level Input Voltage 0.3 V
CC
x 0.2 V
POTENTIOMETER CHARACTERISTICS
R
POT
Potentiometer Resistance
10 Device 10 kW
50 Device 50
00 Device 100
Pot. Resistance Tolerance ±20 %
V
RH
Voltage on R
H
pin 0 V
CC
V
V
RL
Voltage on R
L
pin 0 V
CC
V
Resolution 3.2 %
INL Integral Linearity Error
I
W
2 mA
0.5 1 LSB
DNL Differential Linearity Error
I
W
2 mA
0.25 0.5 LSB
R
WI
Wiper Resistance
V
CC
= 5 V, I
W
= 1 mA 70 200
W
V
CC
= 2.5 V, I
W
= 1 mA 150 400
W
I
W
Wiper Current 4.4 4.4 mA
TC
RPOT
TC of Pot Resistance 300 ppm/°C
TC
RATIO
Ratiometric TC 20 ppm/°C
V
N
Noise 100 kHz / 1 kHz 8/24 nV/Hz
C
H
/C
L
/C
W
Potentiometer Capacitances 8/8/25 pF
fc Frequency Response
Passive Attenuator, 10 kW
1.7 MHz
3. This parameter is tested initially and after a design or process change that affects the parameter.
4. Latchup protection is provided for stresses up to 100 mA on address and data pins from 1 V to V
CC
+ 1 V.
5. I
W
= source or sink.
6. These parameters are periodically sampled and are not 100% tested.
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Table 6. AC TEST CONDITIONS
V
CC
Range 2.5 V V
CC
6 V
Input Pulse Levels 0.2 x V
CC
to 0.7 x V
CC
Input Rise and Fall Times 10 ns
Input Reference Levels 0.5 x V
CC
Table 7. AC OPERATING CHARACTERISTICS (V
CC
= +2.5 V to +6.0 V, V
H
= V
CC
, V
L
= 0 V, unless otherwise specified)
Symbol
Parameter Min Typ (Note 7) Max Units
t
CI
CS to INC Setup 100 ns
t
DI
U/D to INC Setup 50 ns
t
ID
U/D to INC Hold 100 ns
t
IL
INC LOW Period 250 ns
t
IH
INC HIGH Period 250 ns
t
IC
INC Inactive to CS Inactive 1
ms
t
CPH
CS Deselect Time (NO STORE) 100 ns
t
CPH
CS Deselect Time (STORE) 10 ms
t
IW
INC to V
OUT
Change 1 5
ms
t
CYC
INC Cycle Time 1
ms
t
R
, t
F
(Note 8) INC Input Rise and Fall Time 500
ms
t
PU
(Note 8) Powerup to Wiper Stable 1 ms
t
WR
Store Cycle 5 10 ms
7. Typical values are for T
A
= 25°C and nominal supply voltage.
8. This parameter is periodically sampled and not 100% tested.
9. MI in the A.C. Timing diagram refers to the minimum incremental change in the W output due to a change in the wiper position.
Figure 5. A.C. Timing
90% 90%
10%
(store)
t
R
t
F
MI
(3)
t
IC
t
CPH
t
IW
R
W
U/D
INC
CS
t
CI
t
DI
t
ID
t
IL
t
IH
t
CYC

CAT5114YI-10-T3

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Digital Potentiometer ICs DPP,NV 32 taps Up/Down
Lifecycle:
New from this manufacturer.
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