© 2000 Fairchild Semiconductor Corporation DS006708 www.fairchildsemi.com
October 1986
Revised March 2000
DM74AS640 3-STATE Octal Bus Transceiver
DM74AS640
3-STATE Octal Bus Transceiver
General Description
This advanced Schottky device contains 8 pairs of 3-
STATE logic elements configured as octal bus transceiver.
This circuit is designed for use in memory, microprocessor
systems and in asynchronous bidirectional data buses.
This device transmits data from the A bus to the B bus, or
vice versa, depending upon the logic level of the direction
control input (DIR). The enable input (G
) can be used to
disable the devices, effecting isolation of buses A and B.
The 3-STATE circuitry also contains a protection feature
that prevents these transceivers from glitching the bus dur-
ing power-up or power-down.
Features
■ Switching specifications at 50 pF
■ Switching specifications guaranteed over full tempera-
ture and V
CC
range
■ Advanced oxide-isolated, ion-implanted Schottky TTL
process
■ Functionally and pin for pin compatible with Schottky,
low power Schottky, and advanced low power Schottky
TTL counterpart
■ Improved AC performance over Schottky, low power
Schottky, and advanced low power Schottky counter-
parts
■ 3-STATE outputs independently controlled on A and B
buses
■ Low output impedance drive to drive terminated trans-
mission lines to 133Ω
■ Specified to interface with CMOS at V
OH
= V
CC
− 2V
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Top View
Function Table
H = HIGH Logic Level
L = LOW Logic Level
X = Immaterial
Logic Diagram
Order Number Package Number Package Description
DM74AS640WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74AS640N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Control Inputs
Operation
G
DIR
LLB
Data to A Bus
LHA
Data to B Bus
HX Isolation