LTC4412
7
4412fb
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operaTion
Operation can best be understood by referring to the Block
Diagram, which illustrates the internal circuit blocks along
with the few external components, and the graph that
accompanies Figure 1. The terms primary and auxiliary
are arbitrary and may be changed to suit the application.
Operation begins when either or both power sources are
applied and the CTL control pin is below the input low
voltage of 0.35V (V
IL
). If only the primary supply is pres-
ent, the Power Source Selector will power the LTC4412
from the V
IN
pin. Amplifier A1 will deliver a current to
the Analog Controller block that is proportional to the
voltage difference in the V
IN
and SENSE pins. While the
voltage on SENSE is lower than V
IN
– 20mV (V
FR
), the
Analog Controller will instruct the Linear Gate Driver and
Voltage Clamp block to pull down the GATE pin voltage
and turn on the external P-channel MOSFET. The dynamic
pull-down current of 50µA (I
G(SNK)
) stops when the GATE
voltage reaches ground or the gate clamp voltage. The
gate clamp voltage is 7V (V
G(ON)
) below the higher of V
IN
or V
SENSE
. As the SENSE voltage pulls up to V
IN
– 20mV,
the LTC4412 will regulate the GATE voltage to maintain
a 20mV difference between V
IN
and V
SENSE
which is also
the V
DS
of the MOSFET. The system is now in the forward
regulation mode and the load will be powered from the
primary supply. As the load current varies, the GATE volt
-
age will be controlled to maintain the 20mV difference. If
the load current exceeds the P-channel MOSFET’s ability
to deliver the current with a 20mV V
DS
the GATE voltage
will clamp, the MOSFET will behave as a fixed resistor
and the forward voltage will increase slightly. While the
MOSFET is on the STAT pin is an open circuit.
When an auxiliary supply is applied, the SENSE pin will be
pulled higher than the V
IN
pin through the external diode.
The Power Source Selector will power the LTC4412 from
the SENSE pin.
As the SENSE voltage pulls above V
IN
20mV, the Analog Controller will instruct the Linear Gate
Driver and V
oltage Clamp block to pull the GATE voltage
up to turn off the P-channel MOSFET. When the voltage
on SENSE is higher than V
IN
+ 20mV (V
RTO
),
the Analog
Controller will instruct the Linear Gate Driver and Voltage
Clamp block to rapidly pull the GATE pin voltage to the
SENSE pin voltage. This action will quickly finish turning
off the external P-channel MOSFET if it hasn’t already
turned completely off. For a clean transition, the reverse
turn-off threshold has hysteresis to prevent uncertainty.
The system is now in the reverse turn-off mode. Power to
the load is being delivered through the external diode and
no current is drawn from the primary supply. The external
diode provides protection in case the auxiliary supply is
below the primary supply, sinks current to ground or is
connected reverse polarity. During the reverse turn-off
mode of operation the STAT pin will sink 10µA of current
(I
S(SNK)
) if connected. Note that the external MOSFET is
wired so that the drain to source diode will momentarily
forward bias when power is first applied to V
IN
and will
become reverse biased when an auxiliary supply is applied.
When the CTL (control) input is asserted high, the external
MOSFET will have its gate to source voltage forced to a
small voltage V
G(OFF)
and the STAT pin will sink 10µA of
current if connected. This feature is useful to allow control
input switching of the load between two power sources
as shown in Figure 4 or as a switchable high side driver
as shown in Figure 7. A 3.5µA internal pull-down current
(I
CTL
) on the CTL pin will insure a low level input if the pin
should become open.
LTC4412
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applicaTions inForMaTion
Introduction
The system designer will find the LTC4412 useful in a
variety of cost and space sensitive power control applica
-
tions that include low loss diode OR’ing, fully automatic
switchover from a primary to an auxiliary source of power,
microcontroller controlled switchover from a primary to
an auxiliary source of power, load sharing between two
or more batteries, charging of multiple batteries from a
single charger and high side power switching.
External P-Channel MOSFET Transistor Selection
Important parameters for the selection of MOSFETs are
the maximum drain-source voltage V
DS(MAX),
threshold
voltage V
GS(VT)
and on-resistance R
DS(ON)
.
The maximum allowable drain-source voltage, V
DS(MAX),
must be high enough to withstand the maximum drain-
source voltage seen in the application.
The maximum gate drive voltage for the primary MOSFET is
set by the smaller of the V
IN
supply voltage or the internal
clamping voltage V
G(ON).
A logic level MOSFET is commonly
used, but if a low supply voltage limits the gate voltage, a
sub-logic level threshold MOSFET should be considered.
The maximum gate drive voltage for the auxiliary MOSFET,
if used, is determined by the external resistor connected
to the STAT pin and the STAT pin sink current.
As a general
rule, select a MOSFET with a low enough
R
DS(ON)
to obtain the desired V
DS
while operating at full
load current and an achievable V
GS
. The MOSFET nor-
mally operates in the
linear region and acts like a voltage
controlled resistor. If the MOSFET is grossly undersized,
it can enter the saturation region and a large V
DS
may
result. However, the drain-source diode of the MOSFET,
if forward biased, will limit V
DS
. A large V
DS
, combined
with the load current, will likely result in excessively high
MOSFET power dissipation. Keep in mind that the LTC4412
will regulate the forward voltage drop across the primary
MOSFET at 20mV if R
DS(ON)
is low enough. The required
R
DS(ON)
can be calculated by dividing 0.02V by the load
current in amps. Achieving forward regulation will minimize
power loss and heat dissipation, but it is not a necessity.
If a forward voltage drop of more than 20mV is accept-
able then a smaller MOSFET can be used, but must be
sized compatible with
the higher power dissipation. Care
should be taken to ensure that
the power dissipated is
never allowed to
rise above the manufacturer’s recom-
mended maximum
level. The
auxiliary MOSFET power
switch, if used, has similar considerations, but its V
GS
can be tailored by resistor selection. When choosing the
resistor value consider the full range of STAT pin current
(I
S(SNK)
) that may flow through it.
V
IN
and SENSE Pin Bypass Capacitors
Many types of capacitors, ranging from 0.1µF to 10µF and
located close to the LTC4412, will provide adequate V
IN
bypassing if needed. Voltage droop can occur at the load
during a supply switchover because some time is required
to turn on the MOSFET power switch. Factors that determine
the magnitude of the voltage droop include the supply rise
and fall times, the MOSFET’s characteristics, the value of
C
OUT
and the load current. Droop can be made insignificant
by the proper choice of C
OUT
,
since the droop is inversely
proportional to the capacitance. Bypass capacitance for
the load also depends on the application’s dynamic load
requirements and typically ranges fromF to 47µF. In all
cases, the maximum droop is limited to the drain source
diode forward drop inside the MOSFET.
Caution must be
exercised when using multilayer ceramic
capacitors. Because of the self resonance and high Q
characteristics of some types of ceramic capacitors, high
voltage transients can be generated under some start-up
conditions such as connecting a supply input to a hot
power source. To reduce the Q and prevent these transients
from exceeding the LTC4412’s absolute maximum voltage
rating, the capacitor’s ESR can be increased by adding up
to several ohms of resistance in series with the ceramic
capacitor. Refer to Application Note 88.
The selected capacitance value and capacitor’s ESR can
be verified by observing V
IN
and SENSE for acceptable
voltage transitions during dynamic conditions over the
full load current range. This should be checked with each
power source as well. Ringing may indicate an incorrect
bypass capacitor value and/or too low an ESR.
LTC4412
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applicaTions inForMaTion
V
IN
and SENSE Pin Usage
Since the analog controller’s thresholds are small (±20mV),
the V
IN
and SENSE pin connections should be made in a
way to avoid unwanted I R drops in the power path. Both
pins are protected from negative voltages.
GATE Pin Usage
The GATE pin controls the external P-channel MOSFET
connected between the V
IN
and SENSE pins when the
load current is supplied by the power source at V
IN
. In
this mode of operation, the internal current source, which
is responsible for pulling the GATE pin up, is limited to
a few microamps (I
G(SRC)
). If external opposing leakage
currents exceed this, the GATE pin voltage will reach the
clamp voltage (V
GON
) and V
DS
will be smaller. The internal
current sink, which is responsible for pulling the GATE pin
down, has a higher current capability (I
G(SNK)
). With an
auxiliary supply input pulling up on the SENSE pin and
exceeding the V
IN
pin voltage by 20mV (V
RTO
), the device
enters the reverse turn-off mode and a much stronger
current source is available to oppose external leakage
currents and turn off the MOSFET (V
GOFF
).
While in forward regulation, if the on resistance of the
MOSFET is too
high to maintain forward regulation, the
GATE pin will maximize the MOSFET’s V
GS
to that of the
clamp voltage (V
GON
). The clamping action takes place
between the higher of V
IN
or V
SENSE
and the GATE pin.
Status Pin Usage
During normal operation, the open-drain STAT pin can be
biased at any voltage between ground and 28V regard
-
less of the supply voltage to the LTC4412. It is usually
connected to a
resistor whose other end connects to a
voltage source. In the forward regulation mode, the STAT
pin will be open (I
S(OFF)
). When a wall adaptor input or
other auxiliary supply is connected to that input, and the
voltage on SENSE is higher than V
IN
+ 20mV (V
RTO
),
the
system is in the reverse turn-off mode. During this mode of
operation the STAT pin will sink 10µA of current (I
S(SNK)
).
This will result in a voltage change across the resistor,
depending on the resistance, which is useful to turn on an
auxiliary P-channel MOSFET or signal to a microcontroller
that an auxiliary power source is connected. External
leakage currents, if
significant, should be accounted for
when determining the voltage across the resistor when
the STAT pin is either on or off.
Control Pin Usage
This is a digital control input pin with low threshold voltages
(V
IL,
V
IH
) for use with logic powered from as little as 1V.
During normal operation, the CTL pin can be biased at any
voltage between ground and 28V, regardless of the supply
voltage to the LTC4412. A logical high input on this pin
forces the gate to source voltage of the primary P-channel
MOSFET power switch to a small voltage (V
GOFF
). This
will turn the MOSFET off and no current will flow from the
primary power input at V
IN
if the MOSFET is configured
so that the drain to source diode is not forward biased.
The high input also forces the STAT pin to sink 10µA of
current (I
S(SNK)
). See the Typical Applications for various
examples on using the STAT pin. A 3.5µA internal pull-
down current (I
CTL
) on the CTL pin will insure a logical
low level input if the pin should be open.
Protection
Most of the application circuits shown provide some
protection against supply faults such
as shorted, low or
rev
ersed supply inputs. The fault protection does not protect
shorted supplies but can isolate other supplies and the load
from faults. A necessary condition of this protection is for
all components to have sufficient breakdown voltages. In
some cases, if protection of the auxiliary input (sometimes
referred to as the wall adapter input) is not required, then
the series diode or MOSFET may be eliminated.
Internal protection for the LTC4412 is provided to prevent
damaging pin currents and excessive internal self heating
during a fault condition. These fault conditions can be
a result of any LTC4412 pins shorted to ground or to a
power source that is within the pin’s absolute maximum
voltage limits. Both the V
IN
and SENSE pins are capable
of being taken significantly below ground without current
drain or damage to the IC (see Absolute Maximum Voltage
Limits). This feature allows for reverse-battery condition
without current drain or damage. This internal protection
is not designed to prevent overcurrent or overheating of
external components.

LTC4412HS6#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Power Management Specialized - PMIC Automatic PowerPath Controller in ThinSOT
Lifecycle:
New from this manufacturer.
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