10
LT1424-9
sn14249 14249fs
time. Certain parameters of flyback amp behavior will then
be directly affected by the variable enable period. These
include effective transconductance and V
C
node slew rate.
LOAD COMPENSATION THEORY
The LT1424-9 uses the flyback pulse to obtain information
about the isolated output voltage. A potential error source
is caused by transformer secondary current flow through
the real life nonzero impedances of the output rectifier,
transformer secondary and output capacitor. This has
been represented previously by the expression (I
SEC
)(ESR).
However, it is generally more useful to convert this expres-
sion to an effective output impedance. Because the sec-
ondary current only flows during the off portion of the duty
cycle, the effective output impedance equals the lumped
secondary impedance times the inverse of the OFF duty
cycle. That is,
R
OUT
= ESR
R
OUT
= Effective supply output impedance
ESR = Lumped secondary impedance
DC OFF = OFF duty cycle
where,
1
DC OFF
)
)
Expressing this in terms of the ON duty cycle, remember-
ing DC OFF = 1 – DC,
R
OUT
= ESR
DC = ON duty cycle
1
1 – DC
)
)
In less critical applications, or if output load current
remains relatively constant, this output impedance error
may be judged acceptable and the external R
FB
resistor
value adjusted to compensate for nominal expected error.
In more demanding applications, output impedance error
may be minimized by the use of the load compensation
function.
To implement the load compensation function, a voltage is
developed that is proportional to average output switch
current. This voltage is then impressed across the external
R
OCOMP
resistor and the resulting current is then sub-
OPERATION
U
tracted from the R
FB
node. As output loading increases,
average switch current increases to maintain rough output
voltage regulation. This causes an increase in R
OCOMP
resistor current subtracted from the R
FB
node, through
which feedback loop action causes a corresponding
increase in target output voltage.
Assuming a relatively fixed power supply efficiency, Eff
Power Out = (Eff)(Power In)
(V
OUT
)(I
OUT
) = (Eff)(V
IN
)(I
IN
)
Average primary side current may be expressed in terms
of output current as follows:
I
IN
= I
OUT
V
OUT
(V
IN
)(Eff)
)
)
combining the efficiency and voltage terms in a single
variable,
K1
=
I
IN
= K1(I
OUT
) where,
V
OUT
(V
IN
)(Eff)
)
)
Switch current is converted to voltage by a sense resistor
and amplified by the current sense amplifier with associ-
ated gain G. This voltage is then impressed across the
external R
OCOMP
resistor to form a current that is
subtracted from the R
FB
node. So the effective change in
V
OUT
target is:
V
OUT
= K1(I
OUT
) R
FB
(R
SENSE
)(G)
R
OCOMP
)
)
Expressing the product of R
SENSE
and G as the data sheet
value of V
RCCOMP
/I
SW
,
V
RCCOMP
I
SW
)
)
R
FB
R
OCOMP
)
)
R
OUT
= K1 and,
V
RCCOMP
I
SW
)
)
R
FB
R
OUT
)
)
R
OCOMP
= K1 where,
K1 = Dimensionless variable related to V
IN
, V
OUT
and
efficiency as above
11
LT1424-9
sn14249 14249fs
OPERATION
U
V
RCCOMP
I
SW
V
OUT
I
OUT
)
)
R
FB
R
OCOMP
)
)
= K1
Nominal output impedance cancellation is obtained by
equating this expression with R
OUT
.
V
RCCOMP
I
SW
)
)
= Data sheet value for R
CCOMP
pin
action vs switch current
R
FB
= External “feedback” resistor value
R
OUT
= Uncompensated output impedance
APPLICATIONS INFORMATION
WUU
U
The LT1424-X is an application-specific 8-pin part which
implements an isolated flyback switcher/controller. Three
on-chip thin-film resistors are used to “program” the part
for a specific application including mainly desired output
voltage, transformer turns ratio and secondary circuit ESR
behavior. As of Initial Release, the LT1424-9 is available
which implements the “–9V PCMCIA II Isolated LAN
Supply” as described in the Typical Application section.
Potential users with a high volume requirement for other
applications are advised as follows: general experimenta-
tion/breadboarding may be done with the LT1425. This is
a general purpose 16-pin part whose functionality is
similar to the LT1424-X, with the exception that the three
application resistors are external user-supplied compo-
nents. Application information relating to the proper
selection of these resistor values is contained within the
LT1425 data sheet. Once technical feasibility is demon-
strated, the potential user may discuss the possibility of an
additional LT1424-X version with the factory.
OUTPUT VOLTAGE ERROR SOURCES
Conventional nonisolated switching power supply ICs
typically have only two substantial sources of output
voltage error the internal or external resistor divider
network that connects to V
OUT
and the internal IC refer-
ence. The LT1424-9, which senses the output voltage in
both a dynamic and an isolated manner, exhibits addi-
tional potential error sources to contend with. Some of
these errors are proportional to output voltage, others are
fixed in an absolute millivolt sense. Here is a list of possible
error sources and their effective contribution:
Internal Voltage Reference
The internal bandgap voltage reference is, of course,
imperfect. Its error, both at 25°C and over temperature is
already included in the specifications for Reference
Voltage.
Schottky Diode Drop
The LT1424-9 senses the output voltage from the trans-
former primary side during the flyback portion of the cycle.
This sensed voltage therefore includes the forward drop,
V
F
, of the rectifier (usually a Schottky diode). Lot-to-lot
and ambient temperature variations will show up as output
voltage shift/drift.
Secondary Leakage Inductance
Leakage inductance on the transformer secondary
reduces the effective primary-to-secondary turns ratio
(N
P
/N
S
) from its ideal value. This increases the output
voltage target by a similar percentage and has been
nominally taken into account in the design of the
LT1424-9. To the extent that secondary leakage induc-
tance varies from part-to-part, the output voltage will be
affected.
Output Impedance Error
The LT1424-9 contains a load compensation function to
provide a nominal, first-order cancellation of the effects
of secondary circuit ESR. Unit-to-unit variation plus
some inherent nonlinearity in the cancellation results in
some residual V
OUT
variation with load.
12
LT1424-9
sn14249 14249fs
APPLICATIONS INFORMATION
WUU
U
MINIMUM LOAD CONSIDERATIONS
The LT1424-9 generally provides better low load perfor-
mance than previous generation switcher/controllers
utilizing indirect output voltage sensing techniques. Spe-
cifically, it contains circuitry to detect flyback pulse
“collapse,” thereby supporting operation well into dis-
continuous mode. In general, there are two possible
constraints to ultimate low load operation, minimum
switch ON time which sets a minimum level of delivered
power, and minimum flyback enable time, which deals
with the ability of the feedback system to derive valid
output voltage information from the flyback pulse. In the
application for which the LT1424-9 is designed, the
minimum flyback enable time is more restrictive.
The LT1424-9 derives its output voltage information from
the flyback pulse. If the internal minimum enable time
pulse extends beyond the flyback pulse, loss of regulation
will occur. The onset of this condition can be determined
by setting the width of the flyback pulse equal to the sum
of the flyback enable delay, t
ED
, plus the minimum enable
time, t
EN
. Minimum power delivered to the load is then:
1
2
)
)
f
L
SEC
)
)
Min Power =
[V
OUT
• (t
EN
+ t
ED
)]
2
= (V
OUT
)(I
OUT
)
Which yields a minimum output constraint:
1
2
)
)
f(V
OUT
)
L
SEC
)
)
I
OUT(MIN)
=
f = Switching frequency (nominally 285kHz)
L
SEC
= Transformer secondary side inductance
V
OUT
= Output voltage
t
ED
= Enable delay time
t
EN
= Minimum enable time
(t
ED
+ t
EN
)
2
, where
In reality, the previously derived expression is a conserva-
tive one, as it assumes perfectly “square” waveforms,
which is not the case at light load. Furthermore, the
equation was set up to yield just the
onset
of control error.
In other words, while the equation suggests a minimum
load current of perhaps 7mA, laboratory observations
suggest operation down to 2mA to 3mA before significant
output voltage rise is observed. Nevertheless, this situa-
tion is addressed in the application by the use of a fixed
1.8k load resistor, which preloads the supply with a
nominal 5mA.
MAXIMUM LOAD/SHORT-CIRCUIT CONSIDERATIONS
The LT1424-9 is a current mode controller. It uses the V
C
node voltage as an input to a current comparator which
turns off the output switch on a cycle-by-cycle basis as
this peak current is reached. The internal clamp on the V
C
node, nominally 1.9V, then acts as an output switch peak
current limit. This action becomes the switch current limit
specification. The maximum available output power is
then determined by the switch current limit, which is
somewhat duty cycle dependent due to internal slope
compensation action.
Short-circuit conditions are handled by the same mecha-
nism. The output switch turns on, peak current is quickly
reached and the switch is turned off. Because the output
switch is only on for a small fraction of the available period,
internal power dissipation is controlled. (The LT1424-9
contains an internal overtemperature shutdown circuit,
that disables switch action, just in case.)
THERMAL CONSIDERATIONS
Care should be taken to ensure that the worst-case input
voltage and load current conditions do not cause exces-
sive die temperatures. The packages are rated at 110°C/W
for SO-8 and 130°C/W for N8.
Average supply current (including driver current) is:
I
SW
35
)
)
I
IN
= 7mA + DC where,
I
SW
= Switch current
DC = On switch duty cycle
Switch power dissipation is given by:
P
SW
= (I
SW
)
2
(R
SW
)(DC)
R
SW
= Output switch ON resistance

LT1424IS8-9#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Iso Fly Sw Reg w/ 9V Out
Lifecycle:
New from this manufacturer.
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