ISL6121LIBZA-T

10
FN9004.2
November 12, 2004
Implementing Autoreset on the ISL6121
Hot Swap Controller.
Abstract
In applications where the cost, complexity or requirement for
a system controller is avoided and an autonomous power
control function is desired, a device that can monitor and
protect against excessive current failures is needed. This
tech brief shows how to implement such an autonomous
controller using the ISL6121HIB. This application works only
with the ‘H’ version of this device. The ‘H’ version refers to
the enable function being asserted upon a high input.
Introduction
The ISL6118, ISL6119 and ISL6121 are all 2.5V to 5V power
supply controllers, each having a different level of current
regulation (CR). The ISL6118 and ISL6119 have 2
independent controllers with CR levels of 0.6A and 1.0A
respectively whereas the ISL6121 is a single supply
controller with a 2A CR level. Each of these devices features
integrated power switch(es) for power control. Each switch
is driven by a constant current source giving a controlled
ramp up of the output voltage. This provides a soft start
turn-on eliminating bus voltage drooping caused by in-rush
current while charging heavy load capacitances. The
independent enabling inputs and fault reporting outputs for
each channel are available and necessary for the
autonomous autoreset application.
The undervoltage (UV) feature prevents turn-on of the
outputs unless the ENABLE pin and VIN are > 2.5V. During
initial turn-on the ISL6121 prevents fault reporting by
blanking the fault signal. Rising and falling outputs are
current-limited voltage ramps so that both the inrush
current and voltage slew rate are limited, independent of
load. This reduces supply droop due to surge and
eliminates the need for external EMI filters. During
operation, once an OC condition is detected the
appropriate output is current limited to the appropriate level
for 10ms to allow transient conditions to pass. If still in
current limit after the current limit period has elapsed, the
output is latched off and the fault is reported by pulling the
corresponding FAULT
low. The FAULT signal is latched low
until reset by the ENABLE signal being de-asserted at
which time the FAULT
signal will clear.
It is this described sequence of events that allows for the
autoreset function to be implemented in a cost efficient
manner requiring the addition of only an RC network per
channel to the typical application.
Figure 18 illustrates the RC network needed with suggested
component values and the configuration of the relevant pins
for each autoreset channel.
Description of Operation
Initially as voltage is applied to VIN, the pull up resistor (Rpu)
provides for pull up to VIN on both the ENABLE pin asserting
the output once VIN > 2.5V and on the FLTn pin. Once turned
on and an overcurrent (OC) condition occurs the IC provides
CR protection for 10ms and then the FLTn pin pulls low through
Rpu and also pulling the ENABLE low thus resetting the device
fault condition. At this time the Rpu charges the cap and the
voltage on the ENABLE / FLTn node rises until the ENABLE >
2.0 and the output is asserted on once again. This automatic
reset cycle will continue until the OC fault no longer exists on
the output. After several seconds in this mode of operation the
IC thermal protection invokes adjusting the timing of the on-off
cycle to prevent excessive thermal dissipation in the power
switch protecting itself and surrounding circuitry. See Figure 19
for operation waveform.
.
Applications
•USB
2.5V to 5V up to 10W power port protection
FIGURE 18.
VIN
ENABLE
FLTn
GND
ISL6121H
Rpu = 2k
C = 0.1µF
FIGURE 19. AUTO RESET OPERATION
IOUT 1A / DIV
VOUT 2V / DIV
VIN / FLTn 5V / DIV
0A
0V
4ms/DIV
ISL6121
11
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FN9004.2
November 12, 2004
ISL6121
Small Outline Plastic Packages (SOIC)
INDEX
AREA
E
D
N
123
-B-
0.25(0.010) C AM BS
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45
o
C
H
µ
0.25(0.010) BM M
α
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.0532 0.0688 1.35 1.75 -
A1 0.0040 0.0098 0.10 0.25 -
B 0.013 0.020 0.33 0.51 9
C 0.0075 0.0098 0.19 0.25 -
D 0.1890 0.1968 4.80 5.00 3
E 0.1497 0.1574 3.80 4.00 4
e 0.050 BSC 1.27 BSC -
H 0.2284 0.2440 5.80 6.20 -
h 0.0099 0.0196 0.25 0.50 5
L 0.016 0.050 0.40 1.27 6
N8 87
α
0
o
8
o
0
o
8
o
-
Rev. 0 12/93

ISL6121LIBZA-T

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Hot Swap Voltage Controllers W/ANNEAL 2A SINGLE PWR SUPPLY CNTRLR
Lifecycle:
New from this manufacturer.
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