IR2304(S)&(PbF)
2 www.irf.com
Note 1: Logic operational for V
S
of COM -5 to COM +600V. Logic state held for V
S
of COM -5V to COM -V
BS
.
Symbol Definition Min. Max. Units
V
S
High side offset voltage V
B
- 25 V
B
+ 0.3
V
B
High side floating supply voltage -0.3 625
V
HO
High side floating output voltage HO V
S
- 0.3 V
B
+ 0.3
V
CC
Low side and logic fixed supply voltage -0.3 25
V
LO
Low side output voltage LO -0.3 V
CC
+ 0.3
V
IN
Logic input voltage (HIN, LIN) -0.3 V
CC
+ 0.3
Com Logic ground V
CC
-25 V
CC
+ 0.3
dV
S
/dt Allowable offset voltage SLEW RATE — 50 V/ns
P
D
Package power dissipation @ T
A
≤ +25°C 8-Lead SOIC — 0.625
8-Lead PDIP — 1.0
Rth
JA
Thermal resistance, junction to ambient 8-Lead SOIC — 200
8-Lead PDIP — 125
T
J
Junction temperature — 150
T
S
Storage temperature -50 150
T
L
Lead temperature (soldering, 10 seconds) — 300
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions.
V
°C
Symbol Definition Min. Max. Units
V
B
High side floating supply voltage V
S
+ 10 V
S
+ 20
V
S
High side floating supply offset voltage Note 1 600
V
HO
High side (HO) output voltage V
S
V
B
V
LO
Low side (LO) output voltage COM V
CC
V
IN
Logic input voltage (HIN, LIN) COM V
CC
V
CC
Low side supply voltage 10 20
T
A
Ambient temperature -40 125 °C
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V
S
offset rating is tested with all supplies biased at 15V differential.
V
W
°C/W
