INDUSTRIAL TEMPERATURE RANGE
IDT74LVCH16245A
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
1
OCTOBER 2015INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
© 2015 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. DSC-4596/5
FEATURES:
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
•VCC = 3.3V ± 0.3V, Normal Range
•VCC = 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4
μμ
μμ
μ W typ. static)
• All inputs, outputs, and I/O are 5V tolerant
• Available in SSSOP and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Reduced system switching noise
IDT74LVCH16245A
DESCRIPTION:
This 16-bit bus transceiver is built using advanced dual metal CMOS
technology. This high-speed, low power transceiver is ideal for asynchro-
nous communication between two busses (A and B). The Direction and
Output Enable controls are designed to operate this device as either two
independent 8-bit transceivers or one 16-bit transceiver. The direction
control pin (DIR) controls the direction of data flow. The output enable pin
(OE) overrides the direction control and disables both ports. All inputs are
designed with hysteresis for improved noise margin.
All pins can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V supply system.
The LVCH16245A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
The LVCH16245A has “bus-hold” which retains the inputs' last state
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
3.3V CMOS 16-BIT
BUS TRANSCEIVER
WITH 3-STATE OUTPUTS,
5 VOLT TOLERANT I/O AND BUS-HOLD
1DIR
1A1
1
A2
1
A3
1
A4
1
A5
1
A6
1
A7
1
A8
1
B8
1
B7
1
B6
1
B5
1
B4
1
B3
1
B2
1
B1
1
OE
2DIR
2A1
2
A2
2
A3
2
A4
2
A5
2
A6
2
A7
2
A8
2
B8
2
B7
2
B6
2
B5
2
B4
2
B3
2
B2
2
B1
2
OE
1
47
46
44
43
41
40
38
37
48
2
3
5
6
8
9
11
12
24
36
35
33
32
30
29
27
26
25
13
14
16
17
19
20
22
23