LTC4263
13
4263fe
APPLICATIONS INFORMATION
Power Management
The LTC4263 includes a power management feature
allowing simple implementation of power management
across multiple ports driven by a single power supply. The
PWRMGT pins of all LTC4263 devices are tied together
along with an RC network to prevent over-allocation of
power in a multi-port system.
Immediately following classifi cation, the LTC4263 performs
a power management check to ensure power is available
to supply the newly classed PD. The allocated power is
represented by the voltage on the shared PWRMGT node
and the LTC4263 checks the allocated power by measur-
ing this voltage. If the PWRMGT voltage is less than 1V,
there is power available and the power needs of the new
PD are added to the already allocated power on the node.
To allocate power, a current proportional to the power
needs for the new PD is sourced out of the PWRMGT pin
(Table 2).
Table 2. LTC4263 Power Management
IEEE 802.3af
CLASS
PSE OUTPUT
POWER REQUIRED
LTC4263 PWRMGT
CURRENT
0, 3, 4 15.4W –72.3μA
2 7W –32.8μA
1 4W –18.8μA
For multiple LTC4263s implementing power management,
the PWRMGT pins are connected together and to a RC
network connected to V
SS
as shown in Figure 5. The value of
R
PM
represents the full load output capability of the system
power supply (P
FULL_LOAD
). Select a 1% resistor to set the
full load output power using the following formula:
R
kW
P
PM
FULL LOAD
=
213 Ω
_
The LTC4263 power management uses pulse width
modulation to set the power requirements of each PD.
Capacitor C
PM
is used as a lowpass fi lter to generate the
average power requirement for all PDs in the system. Set
C
PM
to 1μF.
If power management is not used, tie PWRMGT to V
SS
.
When additional current is added to the PWRMGT node,
the voltage rises toward the 1V threshold. After adding
current, the LTC4263 verifi es that the power supply is not
over-allocated by verifying the node voltage remains below
1V. If the voltage is below 1V, the LTC4263 proceeds to
power the port. If over 1V, the current is removed from
the node, port powering is aborted, and the LTC4263 goes
back into detection mode.
Figure 5. PWRMGT Pin Connections
PWRMGT
V
SS
LTC4263
PWRMGT
V
SS
LTC4263
PWRMGT
V
SS
LTC4263
PWRMGT
V
SS
V
SS
LTC4263
4263 F05
C
PM
F
R
PM
LTC4263
14
4263fe
APPLICATIONS INFORMATION
Power Control
The primary function of the LTC4263 is to control the
delivery of power to the PSE port. In order to meet IEEE
802.3af requirements and provide a robust solution, a
variety of current limit and current monitoring functions
are needed, as shown in Figure 6. All control circuitry
is integrated and the LTC4263 requires no external
MOSFET, sense resistor, or microcontroller to achieve
IEEE compliance.
The LTC4263 includes an internal MOSFET for driving
the PSE port. The LTC4263 drives the gate of the internal
MOSFET while monitoring the current and the output volt-
age at the OUT pin. This circuitry couples the 48V input
supply to the port in a controlled manner that satisfi es
the PD’s power needs while minimizing disturbances on
the 48V backplane.
Figure 6. Current Thresholds and Current Limits
Port Overload
A PSE port is permitted to supply up to 15.4W continuously
and up to 400mA (I
CUT
) for up to 75ms (t
OVLD
) when in
overload. Per the IEEE 802.3af specifi cation, the PSE is
required to remove power if a port stays in an overload
condition. The LTC4263 monitors port current and removes
port power if port current exceeds 375mA (typ) for greater
than 62ms (typ).
Port Inrush and Short-Circuit
The IEEE 802.3af standard lists two separate maximum
current limits, I
INRUSH
and I
LIM
, that a PSE must implement.
I
INRUSH
refers to current at port turn-on and I
LIM
is the
maximum allowable current in the case of a short after the
port is powered. Because the IEEE specifi cation calls out
identical values, the LTC4263 implements both as a single
current limit referred to as I
LIM
.
When 48V power is applied to the port, the LTC4263 is
designed to power-up the PD in a controlled manner without
causing transients on the input supply. To accomplish this,
the LTC4263 implements inrush current limit. At turn-on,
current limit will allow the port voltage to quickly rise
until the PD reaches its input turn-on threshold. At this
point, the PD begins to draw current to charge its bypass
capacitance, slowing the rate of port voltage increase.
If at any time the port is shorted or an excessive load is
applied, the LTC4263 limits port current to avoid a haz-
ardous condition. The current is limited to I
LIM
for port
voltages above 30V and is reduced for lower port voltages
(see the Foldback section). Inrush and short-circuit cur-
rent limit are allowed to be active for 62ms (typ) before
the port is shut off.
Port Fault
If the port is suddenly shorted, the internal MOSFET power
dissipation can rise to very high levels until the short-circuit
current limit circuit can respond. A separate high speed
current limit circuit detects severe fault conditions
(I
OUT
>
650mA (typ)
) and quickly turns off the internal MOSFET if
such an event occurs. The circuit then limits current to I
LIM
while the t
OVLD
timer increments. During a short-circuit,
I
LIM
will be reduced by the foldback circuitry.
t
OVLD
Timing
For overload, inrush, and short-circuit conditions, the
IEEE 802.3af standard limits the duration of these events
to 50ms-75ms. The LTC4263 includes a 62ms (typ) t
OVLD
timer to monitor overload conditions. The timer is incre-
mented whenever current greater than I
CUT
ows through
the port. If the current is still above I
CUT
when the t
OVLD
timer expires, the LTC4263 will turn off power to the port
and fl ash the LED. In this situation, the LTC4263 waits
four seconds and then restarts detection. If the overload
PORT CURRENT
0mA
100mA
DC DISCONNECT
(I
MIN
)
LIMIT
(I
LIM
)
CUT
(I
CUT
)
200mA
300mA
400mA
500mA
CURRENT LIMIT
PORT OFF IN t
OVLD
DC DISCONNECT
PORT OFF IN t
MPDO
4263 F07
NORMAL
OPERATION
LTC4263
15
4263fe
APPLICATIONS INFORMATION
condition is removed before the t
OVLD
timer expires, the
port stays powered and the timer is reset.
Foldback
Foldback is designed to limit power dissipation in the
LTC4263 during power-up and momentary short-circuit
conditions. At low port output voltages, the voltage
across the internal MOSFET is high, and power dissipa-
tion will be large if signifi cant current is fl owing. Foldback
monitors the port output voltage and reduces the I
LIM
current limit level for port voltages of less than 28V, as
shown in Figure 7.
Figure 7. Current Limit Foldback
Thermal Protection
The LTC4263 includes thermal overload protection in
order to provide full device functionality in a miniature
package while maintaining safe operating temperatures.
Several factors create the possibility for very large power
dissipation within the LTC4263. At port turn-on, while
I
LIM
is active, the instantaneous power dissipated by the
LTC4263 can be as high as 12W. This can cause 40ºC or
more of die heating in a single turn-on sequence. Similarly,
excessive heating can occur if an attached PD repeatedly
pushes the LTC4263 into I
LIM
by drawing too much cur-
rent. Excessive heating can also occur if the V
DD5
pin is
shorted or overloaded.
The LTC4263 protects itself from thermal damage by
monitoring die temperature. If the die temperature exceeds
the overtemperature trip point, the LTC4263 removes port
power and shuts down all functions including the internal
5V regulator. Once the die cools, the LTC4263 waits four
seconds, then restarts detection.
DC Disconnect
The DC disconnect circuit monitors port current whenever
power is on to detect continued presence of the PD. IEEE
802.3af mandates a minimum current of 10mA that the
PD must draw for periods of at least 75ms with optional
dropouts of no more than 250ms. The t
MPDO
disconnect
timer increments whenever port current is below 7.5mA
(typ). If the timer expires, the port is turned off and the
LTC4263 waits 1.5 seconds before restarting detection. If
the undercurrent condition goes away before t
MPDO
(350ms
(typ)
), the timer is reset to zero. The DC disconnect circuit
includes a glitch fi lter to prevent noise from falsely resetting
the timer. The current must be present for a period of at
least 20ms to guarantee reset of the timer. To enable DC
disconnect, tie the OSC pin to V
SS
.
AC Disconnect
AC disconnect is an alternate method of sensing the pres-
ence or absence of a PD by monitoring the port impedance.
The LTC4263 forces an AC signal from an internal sine wave
generator on to the port. The ACOUT pin current is then
sampled once per cycle and compared to I
ACDMIN
. Like DC
disconnect, the AC disconnect sensing circuitry controls the
t
MPDO
disconnect timer. When the connection impedance
rises due to the removal of the PD, AC peak current falls
below I
ACDMIN
and the disconnect timer increments. If the
impedance remains high (AC peak current remains below
I
ACDMIN
), the disconnect timer counts to t
MPDO
and the
port is turned off. If the impedance falls, causing AC peak
current to rise above I
ACDMIN
for two consecutive samples
before the maximum count of the disconnect timer, the
timer resets and the port remains powered.
The AC disconnect circuitry senses the port via the ACOUT
pin. Connect a 0.47μF 100V X7R capacitor (C
DET
) and
a 1kΩ resistor (R
DET
) from the DETECT pin to the port
output as shown in Figure 8. This provides an AC path for
sensing the port impedance. The 1kΩ resistor, R
DET
, limits
current fl owing through this path during port power-on and
power-off. An AC blocking diode (D
AC
) is inserted between
the OUT pin and the port to prevent the AC signal from
V
DD48
– V
OUT
(V)
0
I
LIM
(mA)
300
400
500
40
4263 F07
200
100
0
51015
20 25
30 35 45
50

LTC4263CDE#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Power Switch ICs - POE / LAN 1x IEEE 802.3af Compliant PSE Cntr w/ In
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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